The EOMA68 Libre Computer Developer Wants To Tackle A Quad-Core RISC-V Libre SoC Design

[ldesnogu]

the target sale price of the SoC is around the $4 mark in volumes of 10 million. a $1 royalty per chip represents a whopping 20% increase. for comparison, the Allwinner A64 is $4 including the AXP803 Power Management IC, which on its own can be bought for around $1.

hope that gives some perspective.

Yes that gives some perspective. But that doesn't make the investment any wiser. You still need dozens of millions of dollars of money to build the chips, and that just to reduce by $1 the price of the $65 board (and that $1 I quoted is certainly very exaggerated, as you certainly know if you tried to get information about licensing and royalties). And if you think designing a CPU that reaches the performance of Cortex-A53 can be easily done by a single person, no matter how bright she/he is...

And last point: what benefit is there for me as a user? I clearly see the benefit of open source for software but for hardware the benefit is much lower, close to zero in fact, except from a political or religious standpoint of course. I like your dream of a better world, but one has to get realistic at some point.

Again, I wish you the best in your project, you'll learn a lot of things. But the benefit for end user is close to zero, and the likelihood of success of the project is also close to zero.

[lkcl]

Dude. Don't even go there. I evaluated, synthesized free CPU's back in 2003 already. The very first OpenRISC1200 implementation.

nice! i have a lot of respect for that design. did you know that Allwinner used it as the low-power sleep / management processor in the Allwinner A31? during reverse-engineering someone recognised the format of the bootROM firmware as being OR1k.

I have probably evaluated every reasonable ISA and available "free" CPU implementation.
Don't even begin to think that you are the first on the planet to have these ideas.

i'm not! que?? where did you get that impression! i started the project because i'm aware that there's a huge amount of expertise out there, a huge number of ideas, and this represents an opportunity to short-circuit many of the mistakes that have been made, with an open invitation for people to step up and say "this idea which i had (or encountered during my research and/or work), if you implement it, you stand a higher chance of success".

then i say "cool, thank you very much!", acknowledge them on the contributor list, and, as and when funding comes in, contact them and see if they're available to help out on a paid contract basis.

I'm not trying to put you down but you're annoying the crap out of me.

unfortunately, this is a phenomenon that i'm very familiar with. there really isn't much that i can say, or do, except perhaps to invite you to look up greg bradden's "seven essene mirrors". it's a useful insight but one that may drive you to become even more annoyed, so do bear that in mind

Far better people with far higher skills and better funding in Full Custom ASICs have already tried and failed, miserably.

then (A) as an analytical reverse-engineer, that is a source of information on strategies that haven't worked and (B) as a visionary, someone else's *failure* is not a good reason to stop. imagine if every entrepreneur defined their goals in terms of what they did *NOT* want to succeed in!

All I hear is "gimme money" with 0 HDL lines to show for. People have written bucketloads of HDL code without asking for a single dollar.
Go check the opencores community.

i'm very familiar with it: i spent several months tracking down the source code of various peripherals, and documenting them here https://libre-riscv.org/shakti/m_class/ - many of them were listed on opencores

We already have a community for that. It's called opencores.

i have an outstanding request to join which has not been responded to for nearly... nine going on ten years? i put in the request so long ago i can't remember how far back it was, and i gave up a long time ago trying to contact the sysadmins to get my account verified and approved, as i did not receive a response.

You're not bringing anything new to the table.

well, that's not really true, on two counts. firstly, analysis of the various cores on opencores shows that they're all targetted at maximum of around... estimated... 350 possibly 600mhz, even if put into 28nm, due to the pipeline stages being too short. in addition, none of them have SMP-coherent L1 caches.

secondly, one of the critical pieces of a successful SoC that's missing from opencores is a pinmux. so i spent several months working with the Shakti Team to create one. i couldn't publish it via opencores, because nobody's contacted me about getting the account approved.

thirdly: everyone is different. everyone has different expertise and experience. the way i see it, it's important to me to respect and acknowledge that.

People have written bucketloads of HDL code without asking for a single dollar

(1) have any of those people had a goal to produce a quad-core 800mhz 28nm Libre SoC?

(2) i know how libre truly works. for every piece of libre HDL that is used in this project, i will make sure that the authors are financially compensated. how does it normally work? a corporation goes "ah ha! free! i don't have to pay any moneyyy! har har, suckerrrrs!". why do you think i mentioned right at the top of this response that Allwinner sponged off of your efforts? stings doesn't it? and yet... you're criticising me for making a promise to people to reward them for their efforts to honour libre ethical principles.

...oink??

And good luck with not listening to reason. Really.
My experience tells me you havn't got the slightest clue as to what you're doing.

that's right, i don't, and i know and accept that. an insight: if everyone in the world stopped trying things just because they didn't know how to do it, humanity as a whole would be a lot poorer and unhappier.

one of the things that resulted out of me "not knowing" was that i didn't know that a certain highly limited "tried and tested" architectural design for Vector Processors was "The One True Way To Do Vectorisation". as a result i came up by accident with a design concept that leveraged multi-issue superscalar microarchitectures to drop parallelism on top in a really efficient way.

not only that: *not* knowing means that i have no illusions. i *know* it's important to ask for help and advice, and to give people the opportunity to contribute. i'm sure as s*** not going to stand up and go, "I'm More Important Than You Because I Claim I Know More Than You!!!!!!" - in fact i do the total opposite.

you know more than me? GREAT! one less risk that the project has, because someone with the right expertise stood up and said, "i'll take responsibility for that task", or they said, "in my experience this is the wrong approach, you are much more likely to succeed if you do it this way".

and by saying "thank you" to that person, guess what? people respond! *mitch alsup* has been helping out, by providing incredibly valuable insights from his decades of experience working with AMD. mitch alsup, the designer of the 68000! how cool is that?

so my role, here, is to *document* those contributions and insights, using my skills and training in managing software libre projects, which involves basically giving *other people* the opportunity to take responsibility for tasks that will help achieve the goal. *NOT* in saying "I'm RIght, You're Wrong, Everyone Can Tell Me How Great I Are", yeh? you see how one approach is likely to succeed, and the other is absolutely guaranteed to piss people off? so why in god's name would i even *remotely* consider deploying such an arrogant, arrogant strategy??

[lkcl]

Yes that gives some perspective. But that doesn't make the investment any wiser. You still need dozens of millions of dollars of money to build the chips, and that just to reduce by $1 the price of the $65 board (and that $1 I quoted is certainly very exaggerated, as you certainly know if you tried to get information about licensing and royalties). And if you think designing a CPU that reaches the performance of Cortex-A53 can be easily done by a single person, no matter how bright she/he is...

ye gods, no: i haven't got time to waste. so, instead, i'm on the lookout for bright people, and for forums where i can test out ideas. and i can do this precisely because the project is libre. a proprietary corporate-driven company would stand absolutely no chance of using the strategy of asking *competitors* for design advice!

And last point: what benefit is there for me as a user?

it's a logical extension of the benefits i outlined from EOMA68. look up the fight with apple over "Right to Repair". and how many people throw away perfectly good smartphones and tablets because the firmware (right from the bootloader, using e-fuses with an RSA signing key) is Treachery-Platform-Module locked.

it's a long, long, very practical list that has absolutely nothing to do with "Religion". i know of at least 2 engineers that have a stack of tablets a METRE high that they bought because they thought that they would be able to buy QTY 1000 USD $35 tablets, re-program the firmware and the OS, and use the PCB in their own product as a way to save on engineering PCB CAD costs.

were they successful?

of course not... because the devices were all criminally-infringing copyright "china clones", where not even the factory actually had the firmware. i spent several years tracking this phenomenon back to the source, and it turns out to be the actual Chinese-owned fabless Semiconductor companies that are the originators of the criminally-infringing BSPs (Board Support Packages). Allwinner is one of the absolute worst (only one of the many business units is changing its tune on this).

more on this phenomenon is documented by mjg59: https://mjg59.dreamwidth.org/9387.html - on finding that there was a 95 to 98% GPL violations rate on android tablets, he gave up maintaining the list: it was just too depressing.

so... it's complicated. and has f***-all to do with "Frothing Foaming Bearded UnWashed Religious God-Complex-Driven Zealous Zealous Religious Fervour".

Again, I wish you the best in your project, you'll learn a lot of things. But the benefit for end user is close to zero, and the likelihood of success of the project is also close to zero.

... i gotta try appreciated, ldesnogu.

[kpedersen]

With regards to ASIC hardware, it has almost always been a pipe dream.
Hardware in contrast to software actually requires some serious investments.

Well yeah but these investments have been made and they have been well paid for them and seen a great return. Now if *all* people stop buying the hardware (i.e Intel cpus) until they are open... will Intel just take their designs and company to the grave? Hell no, they will release a cut-down / limited albeit 100% open-source hardware and keep the money flowing.

Unless you think companies will rather not make any money at all and go bankrupt rather than opening up the designs and source. Personally I think it is the latter but I know some in the tech industry rather "control" than money so perhaps time would have to tell.

Yes, this is more "in theory". I don't think it will happen. The NHS alone is quite happy to splurge our tax payers money on Microsoft to simply bless their Windows XP machines, let alone try to starve a company out. But it would be so interesting if it did and could work!

[tuxd3v]

RISC-V has no hope for consumer application without a GPU component.

It doesn't need to be a full computer, could start by IOT, line the FE310, or by the way, a very interesting implementation from the improved RISCV Pulp core, the infamous GAP8, for computing, its a workhorse:

https://greenwaves-technologies.com/en/gap8-product

[milkylainen]

well, that's not really true, on two counts. firstly, analysis of the various cores on opencores shows that they're all targetted at maximum of around... estimated... 350 possibly 600mhz, even if put into 28nm, due to the pipeline stages being too short. in addition, none of them have SMP-coherent L1 caches.

secondly, one of the critical pieces of a successful SoC that's missing from opencores is a pinmux. so i spent several months working with the Shakti Team to create one. i couldn't publish it via opencores, because nobody's contacted me about getting the account approved.

thirdly: everyone is different. everyone has different expertise and experience. the way i see it, it's important to me to respect and acknowledge that.

Well. I'll give you that you certainly seem focus oriented. I'll give you my 0.02. The OR1200 (by Damjan Lampret), according to me, was a badly written 5-stage design.
A lot of asynchronous paths (running circles more or less) made it impossible to verify the 5-stage design above certain frequencies. I had serious trouble reaching 400MHz with 130nm libs even after modifying the design. Stock it would hardly go into 200MHz@130nm with hard SRAMs. I compared it to the VHDL Sparc Leon at the time to. The Sparc Leon (by Jiri Gaisler) was a much cleaner design. Stock they would scale approximately the same, but with a definitive edge to the Sparc implementation for being a much nicer design. Paths seemed to terminate cleanly and on expected wc timings. A 5-stage@800MHz Full Custom design in 28nm should be pretty easy to reach if the design is clean. Adding more stages creates more power drain. I would spend clocking logic elsewhere. Actually. I wouldn't go above 5-7 stages if I were targeting a sub GHz modern cpu with a useful lib. Which also gets me to the next point. Competitive CPU's require much, much more than just an HDL implementation. You require planning on targeting, future expansion paths, planning on power budget, floorplans for your SoC, or atleast a non-haphazard floorplan that shows SoC segmentation for proper scalability. You need high end transcievers and IP-blocks around them to be able to do all kinds of protocols and busses.

The Sparc Leons have been updated nicely. LEON4 is a really nice CPU but the ecosystem is hampered by the will to stay in pretty low end embedded.
It's because high end requires so much more complicated logic.

It's much like anything else. Linux has gone from a hobby project to where it is not by "I am hacking in my basement" but by millions and millions of engineering hours spent on writing code. Hardware is the same. Anyone can write a HDL implementation of a CPU. But from there to a high-end product is eons of hours and in the hardware case, SHITLOADS of money.

Free hardware has failed not because there aren't enough engineers to tinker. But to create viable products you need financial history and backing.
And you need to spit out leading edge designs all the time to keep you from being obsoleted by pure hardware abstraction modelling.
Hell, even renowned ASIC manufactures of all kinds die all the time (even worse than software) because the cash flow required to churn the hardware machinery.
Software is a walk in the park compared to hardware.

So make your plea to someone with shitloads of money that will actually benefit from pissing in the face of the big ones.
Nvidia making their own RISC-V cpu is not because ARM is expensive, but rather that they can and do enjoy pissing in the general direction of ARM.
They do it simply because they don't want to be in the hands of someone else, not because it's financially sound.

In other words. Find your backing in companies that would prefer to not be ARM licensees. Companies that create embedded devices with long lifetime, reproduceability, high cost, high security etc.

The community does not really benefit from doing this. I can't see where the money to churn this apparatus will come from.
Free hardware that does not have performance is something even 99.9999% of the open community will frown upon.

[lkcl]

The community does not really benefit from doing this. I can't see where the money to churn this apparatus will come from.
Free hardware that does not have performance is something even 99.9999% of the open community will frown upon.

indeed. it's why i've not set the goal at what can loosely be termed the "arduino" level. there are a lot of companies planning to do that. also, there are a large number targetting servers, AI, etc. etc. with RISC-V. the market that's being left out is this mass-volume market, including "GPU" and "VPU" as two of the key subcomponents.

about the asynchronous paths: not many people know the true story about Acorn RISC Machines. my friend, barry, was working for VLSI Logic: he found ARM their first very commercial customer (Plessey), and was offered shares and an opportunity to come and join them. he would have been employee number 12... and a millionaire by now

instead, he and his colleague, norman, worked to.. um... how can i put this... um... "make sure that their customer succeeded".... which, putting it bluntly, meant that ARM's first design was s***! it was completely unsynthesiseable

i do have a potential sponsor / customer who, if we can reach a decent milestone (FPGA-proven), he will contact his investors / backers and they will pay for a back-end team to do the layout. that's one approach.

of course, it has to not have those horrible loops, and, well, y'know... if you're not *aiming* for 1ghz speeds, then of course you never get the feedback to ensure that they're taken out *sigh*.

anyway... yeah... it's one hell of an ambitious project. will it succeed? i have no idea. will someone else take it and run with it? i can't say: it's all libre, as much as practical....

[brent]

lkcl has been constantly overpromising and underdelivering, for many, many years now. I wouldn't give this guy even a single dollar.

[lkcl]

lkcl has been constantly overpromising and underdelivering, for many, many years now. I wouldn't give this guy even a single dollar.

thanks! and i can't take money from people with a negative attitude, and who doesn't read the updates. if you bothered to read them, you'd know what has been going on, and why, and who has been helping out - unpaid, mind you - to solve some extraordinarily challenging technical issues that are not faced by easier, more "commodity" style projects.