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C-SKY Architecture Approved For The Linux Kernel, Might Be The Last New CPU Arch

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  • C-SKY Architecture Approved For The Linux Kernel, Might Be The Last New CPU Arch

    Phoronix: C-SKY Architecture Approved For The Linux Kernel, Might Be The Last New CPU Arch

    The Chinese C-SKY 32-bit CPU architecture looks now for sure that it will be added to the in-development Linux 4.20~5.0 kernel. This might also be the last new CPU architecture ever to be added to the mainline Linux kernel...

    http://www.phoronix.com/scan.php?pag...oved-Last-Arch

  • #2
    So how long until it can be removed from the Linux kernel, so we all can just use RISC-V?

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    • #3
      it will leave after amd64.

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      • #4
        "Might Be The Last New CPU Arch" is obviously false to the point of being laughable, why report it? Based on the follow up comments on Kalray MPPA I'm not even sure it'll be the last of this cycle to get merged.

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        • #5
          This C-Sky is some sort of a mips32, at least it has some mips32 instructions..

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          • #6
            If adding the statement "for the foreseeable future" it might have been true, but plain "ever" is not. There is no chance for there not be be new architectures in the future, specially now with more competition between them since this will force the development of better migration and compatibility tools. Ideally we can agree on good enough layers for the architecture to be freely switched according to the user specifications, like a craftsmen can change his tool, in the maybe still distant future, finally ending the worst vendor locks and ensuring a good deal of livability to data and systems. There are lots of good data we are losing due to losing the means to read and interpret what is stored in legacy mediums and formats.

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            • #7
              Yeah not sure if it's "probable" that it could be the last, but then again not sure I am feeling like nit picking.

              Lets just put our doomsday hats on and say next IBM will buy Linus ownership in the kernel and then shut the whole thing down.

              /fallingsky

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              • #8
                Admittedly it's still behind closed doors, but Microsoft's E2 was being ported last I heard: https://www.theregister.co.uk/2018/0...ge_windows_10/

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                • #9
                  Yeah, it's silly to think that ISA design is at a dead end. With process-lead performance improvements hitting a wall, there's too much to be gained by rethinking the whole relationship with caches. Also, branch prediction efficiency might be improved with explicit hints. There are other sorts of innovations possible, I'm sure.

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                  • #10
                    Originally posted by c117152 View Post
                    Admittedly it's still behind closed doors, but Microsoft's E2 was being ported last I heard: https://www.theregister.co.uk/2018/0...ge_windows_10/
                    Very cool. This might be something towards what I was talking about - reducing dependence on speculative execution and perhaps even the cache hierarchy.

                    At a high level, it smells a bit like Intel's EPIC. But, when you dig into it, I see more similarities with transport-triggered architectures.

                    According to the update in that Register article, I wouldn't hold my breath for it to see the light of day. But it's always good to know that the wheels of processor research are still turning.

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