L1 Terminal Fault - The Latest Speculative Execution Side Channel Attack

[Weasel]

This is causing those processing big data to be looking at risc-v and other things. Including strange ideas like having a cpu core having a thread management core. So you have a in-order core with upto 1024 threads cpu managed. So ever time it has to wait it changes to the next thread.

In order means you don't have speculative execution issues. Yes we are use to hyperthreading being 2 thread per core. 1024 per core is a completely different beast.

All these speculative execution issues could see the x86 loss the super computer and big server markets.

In-order would make the CPU extremely slow. IBM tried already a similar experiment and it was total failure.

To be clear: I'm talking about general purpose computing, not supercomputers, which nobody here really gives a crap about. You know, the kind of thing with millions of branches all over the place and very little straight parallelization potential. That's why VLIW was a failure in this context.

[cybertraveler]

Um, because intent requires evidence?

I'm guessing you mean 'proving intent' not just 'intent'. Obviously you don't need evidence to have intent. But in a court room for instance, you need evidence to prove intent.

I'm not in a court room, I suggested a plausible possibility, so I don't require evidence.

Or is it just your belief?

You repeat that back like a child in a playground.

You made a statement of fact:
"when it's incompetence in the case of speculative execution vulnerabilities."

You don't appear to have evidence to back your statement; hence I asked if it's just your belief.

I have not made any statements. I just suggested a possibility. There are a number of possibilities and if you know how to think, you should know that someone presenting a possibility is not the same as them presenting a statement of fact (as you did).

I don't require evidence for my suggestion because I'm not saying it's true. You do require evidence as you made a statement of fact. If you don't have evidence then how about you admit that it's just your belief, or that you misspoke or that you simply take it back. Any of those would be better than making ridiculous, strawman, statements like this:

Every bug is not a conspiracy.

[oiaohm]

Yeah, that seems likely in the longer term, but in the short term nobody is looking at it for general purpose computing.

There are a few different risc-v working groups attempting to get laptop and other general purpose computing worked out. This is still a few years out. Debates about how what would be called north and south bridges in intel architecture should be done for risc-v has not settled down yet there are a few competitors.

https://genzconsortium.org/about-us/gen-z-technology/

Its bus like gen-z that are competing.

Basically there is a uplimit how long those using x86 platform will tolerate poor performance before risc-v, power, arm or combination of all three start eating into its market share.

brrrrttttt if you define of short term in 5 years there is every possibility we will see the start of general purpose computing coming in risc-v. Of course standard bus will allow CPU to be made by 1 vendor and motherboard to be made by a different one.

Do take close look at gen-z its not design to be CPU vendor particular. So we could have motherboards that don't care if you put a x86, arm, power, risc-v cpu in them. The board would be gen-z. Also gen-z you don't have to put identical cpu types in. So you could have a x86 with risc-v or any other combination like that.

Yes the new busses for general purpose computing are not being designed with only x86 in mind. So where general purpose computing will start heading in the next few years is not locked in.

[NotMine999]

I am beginning to think all of the Intel-specific security issues, and I am assuming this one is "Intel-specific" until proven otherwise, are like the house guest (or in-laws, if you prefer) that simply will not leave.

[brrrrttttt]

https://insidehpc.com/2018/05/mateo-...architectures/
Funny developer and maintainer of a super computer is nobody apparently.

Sorry there are many videos covering the current RISC-V prototype chips being developed for different super computers and big data processing systems. True big data is looking at risc-v due to the fact that can invest custom silicon to in fact speed up processing. I do think it still going to be years before risc-v comes general server farm.

Due to the silicon limit we are seeing the general processor loss its place in the top end.

CPU managed threading is returning to the old cray barrel system.

brrrrttttt so general server farm is having arm and power attempting to get traction. You see big data server farms and super computers are getting more custom hardware based around risc-v.

Of course the question is will some form of new general chip appear out of big data and super computer usages of risc-v.

Yeah, that seems likely in the longer term, but in the short term nobody is looking at it for general purpose computing.

[oiaohm]

Nobody is looking seriously at RISC-V. Some server farms have already moved to ARM.

https://insidehpc.com/2018/05/mateo-...architectures/
Funny developer and maintainer of a super computer is nobody apparently.

Sorry there are many videos covering the current RISC-V prototype chips being developed for different super computers and big data processing systems. True big data is looking at risc-v due to the fact that can invest custom silicon to in fact speed up processing. I do think it still going to be years before risc-v comes general server farm.

Due to the silicon limit we are seeing the general processor loss its place in the top end.

CPU managed threading is returning to the old cray barrel system.

brrrrttttt so general server farm is having arm and power attempting to get traction. You see big data server farms and super computers are getting more custom hardware based around risc-v.

Of course the question is will some form of new general chip appear out of big data and super computer usages of risc-v.

[brrrrttttt]

This is causing those processing big data to be looking at risc-v and other things. Including strange ideas like having a cpu core having a thread management core. So you have a in-order core with upto 1024 threads cpu managed. So ever time it has to wait it changes to the next thread.

In order means you don't have speculative execution issues. Yes we are use to hyperthreading being 2 thread per core. 1024 per core is a completely different beast.

All these speculative execution issues could see the x86 loss the super computer and big server markets.

Nobody is looking seriously at RISC-V. Some server farms have already moved to ARM.

[wdb974]

Um, because intent requires evidence? Or is it just your belief? Every bug is not a conspiracy.

Also, as per Hanlon's razor: "Never attribute to malice that which is adequately explained by stupidity."

[brrrrttttt]

Where did you find out that? Or is it just your belief?

Hanlon's razor.

[oiaohm]

Well, it seems Moore's law is now inverted. Every other month we loose some computing power in an attempt to mitigate the new discovered flaws. I wouldn't be surprised if by the end of 2018, CPU's will be at least 50% slower...lol

This is causing those processing big data to be looking at risc-v and other things. Including strange ideas like having a cpu core having a thread management core. So you have a in-order core with upto 1024 threads cpu managed. So ever time it has to wait it changes to the next thread.

In order means you don't have speculative execution issues. Yes we are use to hyperthreading being 2 thread per core. 1024 per core is a completely different beast.

All these speculative execution issues could see the x86 loss the super computer and big server markets.