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Linux 5.11 Begins Early Prepping Around PCI Express 6.0

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  • Linux 5.11 Begins Early Prepping Around PCI Express 6.0

    Phoronix: Linux 5.11 Begins Early Prepping Around PCI Express 6.0

    With the PCI subsystem updates for the in-development Linux 5.11 kernel is the ability to report whether a device is making use of the 64 GT/s link speed allowed by PCI Express 6.0...

    http://www.phoronix.com/scan.php?pag...4-GTs-PCIe-6.0

  • #2
    What's GT/s?

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    • #3
      Originally posted by Beherit View Post
      What's GT/s?
      GigaTransfers per second. See https://en.wikipedia.org/wiki/Transfer_%28computing%29

      In PCIe specifically, each lane can send one bit and receive on bit per transfer. So a x16 lane at the PCIe6 speed of 64 GT/s gives you 64 * 16 * 2 / 8 = 256 GB/s.
      Last edited by jabl; 16 December 2020, 06:31 AM.

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      • #4
        AMD Raven Ridge integrated GPU ATS (Address Translation Services) is being marked as broken for select platforms.
        How do I find out which platforms is it getting disabled for?

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        • #5
          Originally posted by jabl View Post
          In PCIe specifically, each lane can send one bit and receive on bit per transfer. So a x16 lane at the PCIe6 speed of 64 GT/s gives you 64 * 16 * 2 / 8 = 256 GB/s.
          Not entirely right. Or atleast explanation with some fuzz.
          PCIe 6.0 uses PAM-4. So effectively 2-bits per transfer.
          You can (and do) say 64 GT/s.
          But in reality it's more like 32 GT/s * 2 bits of line encoding with FEC (Forward Error Correction).

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          • #6
            Originally posted by StandaSK View Post

            How do I find out which platforms is it getting disabled for?
            Use the source: https://git.kernel.org/pub/scm/linux...5ecc72f18c7e81

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            • #7
              Originally posted by StandaSK View Post

              How do I find out which platforms is it getting disabled for?
              Some (dev?) board called "mCOM10L1900", not a retail laptop

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              • #8
                this is a truly amazing PCIe gen6 enablement patch, maybe one of the greatest ever seen, but hey, it is more than a one line printk ;-) https://git.kernel.org/pub/scm/linux...8820fc3f8ead1b

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                • #9
                  PCIe 6.0 already? 5.0 was just drafted a year ago and 6.0 now?

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                  • #10
                    Originally posted by tildearrow View Post
                    PCIe 6.0 already? 5.0 was just drafted a year ago and 6.0 now?
                    The PCI SIG has stated they kind of slept on PCIe 4.0 after 3.0 was released. In the mean time, the CPU market has changed, we now have NICs, data center interconnects, and storage that can actually benefit from higher bandwidth, and PCI SIG members like Intel, AMD, Nvidia (Mellanox), Ampere, etc that want to push the technology.

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