RISC-V SiFive Freedom Unleahsed 540 SoC / HiFive Unleashed Board Added To Coreboot

[tg--]

I'm actually amazed how fast they managed to come to market.
I certainly didn't expect a high-performance RISC-V SoC before 2020 until SiFive announced what they are doing.

The 999$ price tag is no big deal, this is a very early devboard not targeted for consumers or even hobbyist open source programmers, this is a board for companies planning to do their own systems with a SiFive SoC. In fact, considering that, the price point is quite low, similar systems are usually much more expensive.

Developing for a 28 nm process is also quite smart, since the GPU and CPU vendors moved on to 10-18 nm processes and there are huge capacities of 28 nm fabs available which will mean that they will be able to offer their SoCs at a quite low price point.

It's now only a matter of time until we will see the 100$ or 50$ boards for hobbyists.

Props to SiFive to start out with Coreboot from the get-go; this is a great sign that they intend to stick to their open source promises and already makes their systems more desirable than many ARM SoC producers (who gradually have moved away from providing u-boot support and more and more shipping closed source (stage 1) bootloaders).

Considering how fast they have been moving, I revise my opinion that we won't see high-performance consumer systems before 2020.

Sure, it'll take a while until they get into spheres of modern ARM SoCs concering performance/W or modern amd64 CPUs in raw performance, but I'm certainly looking forward to it.
Still, I'll try to get not too excited, because it's still very much uncertain, that we'll actually see a lot of systems that are more open than the ARM world is today and more likely than not, many upcoming RISC-V based systems will contain proprietary microcode and effectively be no improvement for enduser freedom.

But it's looking like ARM is getting a competitor, and at the very least prices will go down. Due to SiFives business-model und more easily accessible IP it'll almost certainly improve the chance for proper open source drivers as well.
All in all, RISC-V as an ISA and SiFive as a IP producer seem to be a net gain not just for the industry, but also for the end-user and open-source enthusiast.

[Danielsan]

No one serious hacker will buy one of those boards a that price since the moment you can emulate (I guess) this processor and many of the other feature that the board provides. Because the price I believe the targets are Universities and other Research Institutes.

[onicsis]

No one serious hacker will buy one of those boards a that price since the moment you can emulate (I guess) this processor and many of the other feature that the board provides. Because the price I believe the targets are Universities and other Research Institutes.

For the moment, more likely this board is targeted for companies with large R&D budgets and a lot of enthusiasm and optimism . Not for universities teachers or students.

[Ray54]

I am not familiar with the SiFive board, but what is the management core for? I think I read that CoreBoot is a small linux process that boots the main OS and then exits, so can that not run on one of the main cores? I would not really want a management core being always active, like it is with Intel and AMD, as it seems like a recipe for security holes, or am I misunderstanding the design?

[Yndoendo]

I am not familiar with the SiFive board, but what is the management core for? I think I read that CoreBoot is a small linux process that boots the main OS and then exits, so can that not run on one of the main cores? I would not really want a management core being always active, like it is with Intel and AMD, as it seems like a recipe for security holes, or am I misunderstanding the design?

Management core is not Intel Me or AMD PSP.

RISC-V allows for cores to serve a designated purpose. Idea is kind of like PS3 cell processing but built at the ISA level.

RV64IMAC = RISC-V 64bit that supports I = Integer Basic Instructions, M = Integer Extended Multiplication and Division, A = Atomic Instructions, C = Compressed Instructions

RV64GC = RISC-V 64bit that supports G = General Purpose Instructions that supports (MAFD) and C = Compressed Instructions

Say you need a SoC for monitoring an Air-plane with 100 sensors; each sensor could have it's own core that is designed just for what that sensor needs to be managed instead of 100 general purpose cores.

[AndyChow]

I am not familiar with the SiFive board, but what is the management core for? I think I read that CoreBoot is a small linux process that boots the main OS and then exits, so can that not run on one of the main cores? I would not really want a management core being always active, like it is with Intel and AMD, as it seems like a recipe for security holes, or am I misunderstanding the design?

The riscv architecture allows you to mix many different core types according to use profiles. The "management core" is just another core, but with different instruction sets. You can see what instructions are available by the name:

RV64IMAC gives you the integer, multiply and divide, atomic and compressed instruction sets. No floating point.
RV64GC provides a general-purpose scalar instruction set plus the compressed set. It's RV64IMAC+FD, floating and double-precision floating.

My feeling is that it's just there for testing and to get a feel of how to handle this technology. Ultimately, riscv is going to be used in exascale scenarios. You'll have various specialized cores that serve to do only a few instructions, but do them very well, and other cores that do more general instructions. That's really going to blow up with 128-bit riscv, but we have to start understanding how to get there now. Imagine in your business, you just find out you need to do a lot of AVX-512 instructions. No need to buy a CPU with every instruction under the sun + AVX-512, you could just buy 100 chips that only do AVX-512, and let the other chips handle the topology of the other instructions. And each instruction gets it's own IP, so it can be sent inside your corporate wide computing facilities, world-wide, to whatever place is going to handle it faster. It's going to open up a whole lot of possibilities.

[starshipeleven]

Someone needs to build a socketed version of this chip, and an ATX or Mini-ITX form-factor motherboard, with PCIe slots, DDR4 RAM slots, VGA, HDMI, USB 3.0, WiFi, SATA 3, M.2 support, etc...
Then that might spur more Linux development and it could turn into a viable ARM or x86 competitor.

The current tiny board sells for the very low price of 1000$, can you imagine how mindboggingly more expensive a board with all these interfaces will be?

Before we talk of competing with ARM or x86 the prices need to come down a little.

[starshipeleven]

$999 USD for similar or less specs than you'd get out of a $99 USD SBC?(RK3999 like the Rock64/RockPro64/ODROID-N1) What's the big cost difference?

Small production runs on both the board AND the SoC, as simple as that.

Even a piece of shit Allwinner-based raspi clone would cost like that if it was produced in very low volumes.

Price will go down if this is mass-produced properly at normal scales.

[starshipeleven]

This sucks, it is so expensive.
I would pay no more than a Raspberry Pi for this.
Raspberry Pi has superior tooling and price. It is a better product at a better price.
This SiFive is a worse product at a worse price.

You're comically myopically focused on your point of view as usual.

This is a devboard for developers that want to start using Risc-V at company-scale projects, why the fuck are you comparing it to a consumer-grade tinkerboard? There is no OS that can run on this thing (yet), consumers should stay the fuck away from this.

[starshipeleven]

These boards are just for serious developers and kernel hackers. Basically, there doesn't exist a distribution that can run on this, and most software won't compile out of the repo. You SSH into this, and try to get something to work.

More like "serial or TTL or JTAG into this".