A Detailed Look At The Failed GPLGPU Open-Source GPU

[coder]

Don't you guys know it's provably impossible to win an argument on the internet?

I don't get how you can make someone STFU, without mod powers. Just make your points, indicate where you don't accept the others', and move on.

And FWIW, I don't see the point of opensourcing this ancient relic, except for academic or historical purposes.

Also, to weigh in on the completely open source system debate, it seems to me that the most benefit is derived from using a FPGA. That way, you can hack your hardware platform, in exactly the way that GPL aims to let you hack your software platform. No need to fab anything. Obviously, you'll pay for that freedom in the form of lower performance and less functionality.

[starshipeleven]

Don't you guys know it's provably impossible to win an argument on the internet?

What makes you think we don't know it? Maybe we just find fun shouting at each other, who are you to judge lol.

I don't get how you can make someone STFU, without mod powers.

I just demonstrated it in this very thread. You keep going against him until he quits or his arguments are 100% flame against you.

And FWIW, I don't see the point of opensourcing this ancient relic, except for academic or historical purposes.

Which is why it was opensourced anyway.

Also, to weigh in on the completely open source system debate, it seems to me that the most benefit is derived from using a FPGA. That way, you can hack your hardware platform, in exactly the way that GPL aims to let you hack your software platform. No need to fab anything. Obviously, you'll pay for that freedom in the form of lower performance and less functionality.

Nonsense, FPGAs are also closed-source hardware themselves, with their own closed firmwares and toolchains (you need to program the FPGA to get it to emulate the IC you want, and that part happens only with closed-source tools dealing with closed-source firmwares).

I'd rather just use closed-source ASIC hardware than closed-source FPGA hardware on performance and ease-of-use alone.

[coder]

Maybe we just find fun shouting at each other, who are you to judge lol.

You seemed to get a bit heated for it to be fun. My perceptions and expectations to that end were not unjustified. And this is not a matter for debate.

Nonsense, FPGAs are also closed-source hardware themselves, with their own closed firmwares and toolchains (you need to program the FPGA to get it to emulate the IC you want, and that part happens only with closed-source tools dealing with closed-source firmwares).

I'd rather just use closed-source ASIC hardware than closed-source FPGA hardware on performance and ease-of-use alone.

Perfect is the enemy of good. By having an opensource hardware platform built on a FPGA, end users would gain far more control over it than closed-source ASIC hardware. If it's important for someone to really extend GPL freedoms to their hardware platform, then I think it's worthwhile to consider the option.

To look at the flip side, assume you had a whole ASIC design and fabrication process based on GPL-like licenses and freedoms. Even then, if an end user wants to change something about their hardware, it would be almost as impractical as if the hardware were fully closed-source - because who has the time, money, and expertise to do a full respin just to add some little feature? But, if it were an FPGA, then changing it is far more practical.

That's all I was trying to say.

[starshipeleven]

Perfect is the enemy of good. By having an opensource hardware platform built on a FPGA, end users would gain far more control over it than closed-source ASIC hardware.

No, because whatever powers that are causing the current ASIC to become full of stupid crap will also cause the FPGA to be full of stupid crap too. In the ASIC parts of it, not on the FPGA parts.

To look at the flip side, assume you had a whole ASIC design and fabrication process based on GPL-like licenses and freedoms. Even then, if an end user wants to change something about their hardware, it would be almost as impractical as if the hardware were fully closed-source - because who has the time, money, and expertise to do a full respin just to add some little feature? But, if it were an FPGA, then changing it is far more practical.

You grossly underestimate the ease of adding hardware features, while it sounds good on paper, adding new stuff to an FPGA is not really something "end users" will ever be able to do.
And anyway, FPGAs come in various sizes too, you cannot emulate a 12-core titan-GPU-equipped APU in a FPGA that does not cost a whole fucking lot and is designed with high-power-usage in mind.

Also the performance issues can't be ignored. FPGA performance is low. Very very low if compared to ASIC hardware it is emulating.

I personally think that hope should be put on RISC-V. It's the best we can possibly get with current technology.

[coder]

No, because whatever powers that are causing the current ASIC to become full of stupid crap will also cause the FPGA to be full of stupid crap too. In the ASIC parts of it, not on the FPGA parts.

You grossly underestimate the ease of adding hardware features, while it sounds good on paper, adding new stuff to an FPGA is not really something "end users" will ever be able to do.
And anyway, FPGAs come in various sizes too, you cannot emulate a 12-core titan-GPU-equipped APU in a FPGA that does not cost a whole fucking lot and is designed with high-power-usage in mind.

Also the performance issues can't be ignored. FPGA performance is low. Very very low if compared to ASIC hardware it is emulating.

The performance and functionality tradeoff is obvious, and what one considers "stupid crap" is up for debate. If we're talking about backdoors, then I doubt meaningful backdoors can be engineered into the FPGA that would allow a system running a soft CPU on one to be compromised. Sure, I'm not going to say it's impossible, but just that much more impractical.

Secondly, by "end users" I meant in the same sense as GPL is concerned with them for software. The idea of GPL is that you should not be impeded from modifying any bit of your software stack. By extension, the most practical objective of a GPL hardware should be to extend the same freedom over ones hardware platform.

That said, I don't see myself as a candidate for such a system. I value performance and features too much for that. I wouldn't even give up 50% of my performance to run RISC-V.

But, maybe some country would like to use a GPL stack, all the way down to the CPU, for their voting machines.

[starshipeleven]

The performance and functionality tradeoff is obvious, and what one considers "stupid crap" is up for debate. If we're talking about backdoors, then I doubt meaningful backdoors can be engineered into the FPGA that would allow a system running a soft CPU on one to be compromised. Sure, I'm not going to say it's impossible, but just that much more impractical.

Most FPGAs are secondary coprocessors to a primary ARM core(s) that deals with most of the stuff on the board from initialization onwards. This is to ease the development as you don't need to waste valuable FPGA space to initialize or control the hardware, if you don't want to.

Soooooooooo..... yeah, the ARM core is a big enough hardware backdoor for you? If they close it down they own the board.

Secondly, by "end users" I meant in the same sense as GPL is concerned with them for software. The idea of GPL is that you should not be impeded from modifying any bit of your software stack. By extension, the most practical objective of a GPL hardware should be to extend the same freedom over ones hardware platform.

There are limits beyond which any push for "freedom" is an exercise in pure ethics without any practical benefit.

That said, I don't see myself as a candidate for such a system. I value performance and features too much for that. I wouldn't even give up 50% of my performance to run RISC-V.

RISC-V isn't strictly for FPGA, it is for ASICs and it's just an ISA, so someone can produce powerful stuff with it if so inclined.

It is developed by major companies in chip design (except Intel) and big software companies, not by FSF.

But, maybe some country would like to use a GPL stack, all the way down to the CPU, for their voting machines.

Huh? No, they need to be able to cheat for that.

[coder]

Okay, I've made my point, which is that a GPL'd FPGA soft core is a more practical freedom than a GPL'd ASIC. It's purely hypothetical (as far as I'm concerned), so it really doesn't need your approval.

BTW, yes, I know what RISC-V is, and generally a bit more about FPGAs than you credit me for.

Peace out.

[starshipeleven]

Okay, I've made my point, which is that a GPL'd FPGA soft core is a more practical freedom than a GPL'd ASIC.

I already told facts to show that it's plain wrong, and we both agree on the fact that the performance hit is significant and is not really worth it.

It's purely hypothetical (as far as I'm concerned), so it really doesn't need your approval.

Even "purely hypotetical" stuff can be plain wrong, I'm just pointing out facts you missed in your analysis.

[coder]

I already told facts to show that it's plain wrong, and we both agree on the fact that the performance hit is significant and is not really worth it.

Even "purely hypotetical" stuff can be plain wrong, I'm just pointing out facts you missed in your analysis.

That doesn't make sense. You must be confusing exchanges with different posters. There's nothing "plain wrong" about my idea, even if you don't like it. And just because I don't consider the performance tradeoff worthwhile for myself doesn't mean that no one will.