Intel's Xeon Phi Is Being Sold For An Insanely Low Price Right Now

[wizard69]

That about covers it.

So it is card only for Server/Rack motherboards with Very good (and loud) ventilation, or Workstations, both already having ECC and that are compatible with card.
You also need Intel compiler that is non-free and will probably cost you more then the card(s).

I don't know of anyway to get around the Intel compiler need at the moment. Usage of the cards is a bit complex anyways as they run their own operating system.

As I understand from previous nice comments,
you would buy this card if you want to put it in your compatible Workstation to try it out with your specialized software, willing to buy Intel support software

Or you intend to write that specialized software or have access to software already built that supports the card. This isn't a card you invest in lightly.

and you know what you are doing with ECC supported specialized high precision floating point hardware, while deciding if buying many more of them for your company's crunching farm.

Well in some cases. I suspect that it is underestimated how interesting this card is to workstation users. It would be the same crowd that uses GPU compute solutions regularly.

[pal666]

Please tell me where can I buy 1TFlops of double precision compute power for ~$200?

two year old radeons are faster. you can buy them on the internet. did i answer your question ?

[PreferLinux]

two year old radeons are faster. you can buy them on the internet. did i answer your question ?

And where is the ECC, large amounts of RAM, and so on?

[sascha]

So the card is actually about $500 instead of ~$200?

[Proksima]

Most of you guys forget an important point. First of all, let us forget about the special register and such. That co-processor has its own ip address, you can ssh into it and run programs normally. Which means that in the worst case scenario, you got 57 * 4 threads (correct me for the amount of threads if I am wrong) ~ 225 threads to run applications on the co-processor that could use message passing (for example) to communicate with a process on the computer.

Then, if on top of that, you go on the trouble to rewrite sensible part of your code (the one doing the number crunching) in C/C++ and compile it with either Intel (or in the future, GCC) with flags to optimize for the co-processor, it will start using some of the special capabilities of the co-processor.

And then if you are hardcore and love playing with intrinsic, you can always write the specialized code that take advantage of the special hardware yourself.

The real con is that you need an Intel-box with LGA 2011 and a clever cooling mechanism. As well as making sure you meet all the other minimum requirements. For the rest, you have a good base, and the rest is incremental upgrades.


I don't even own an intel box at the moment and purchased it for the (near) future.

[darkblu]

Most of you guys forget an important point. First of all, let us forget about the special register and such. That co-processor has its own ip address, you can ssh into it and run programs normally. Which means that in the worst case scenario, you got 57 * 4 threads (correct me for the amount of threads if I am wrong) ~ 225 threads to run applications on the co-processor that could use message passing (for example) to communicate with a process on the computer.

GCC has planned OpenMP support for the Phi cores, but it's not clear if/how well the SIMD ISA will be supported (you need autovectorization, etc). Which takes us to the point, which is that without their SIMD ISA, those cores are 1.1GHz-clocked P54C's with x4 SMT each. I repeat, p54C - those are not even Atoms! The single-thread performance of P5 is mid-'90s material. An ARM11 would yield better IPC than that.

Then, if on top of that, you go on the trouble to rewrite sensible part of your code (the one doing the number crunching) in C/C++ and compile it with either Intel (or in the future, GCC) with flags to optimize for the co-processor, it will start using some of the special capabilities of the co-processor.

I'm not aware of any GCC developments to accommodate KNC ISA support. On the other hand, the upcoming KNL will see Clang/LLVM support since day one, but that's a completely different product.

And then if you are hardcore and love playing with intrinsic, you can always write the specialized code that take advantage of the special hardware yourself.

I assume you're referring to the Intel compiler alone. GCC does not do KNC/MIC ops, intrinsincs or otherwise. Your only two shots at using Phi's SIMD ISA are:
1) Writing in assembly.
2) Using Intel's OpenCL for MIC. That might be free, IIRC, but last time I tried it it didn't strike me as particularly mature, so your mileage may vary.

The real con is that you need an Intel-box with LGA 2011 and a clever cooling mechanism. As well as making sure you meet all the other minimum requirements. For the rest, you have a good base, and the rest is incremental upgrades.

I disagree there - there's nothing incremental if your target ISA does not have a proper compiler. And a proper compiler equals $$$ in this case.

[Proksima]

GCC has planned OpenMP support for the Phi cores, but it's not clear if/how well the SIMD ISA will be supported (you need autovectorization, etc). Which takes us to the point, which is that without their SIMD ISA, those cores are 1.1GHz-clocked P54C's with x4 SMT each. I repeat, p54C - those are not even Atoms! The single-thread performance of P5 is mid-'90s material. An ARM11 would yield better IPC than that.


I'm not aware of any GCC developments to accommodate KNC ISA support. On the other hand, the upcoming KNL will see Clang/LLVM support since day one, but that's a completely different product.


I assume you're referring to the Intel compiler alone. GCC does not do KNC/MIC ops, intrinsincs or otherwise. Your only two shots at using Phi's SIMD ISA are:
1) Writing in assembly.
2) Using Intel's OpenCL for MIC. That might be free, IIRC, but last time I tried it it didn't strike me as particularly mature, so your mileage may vary.


I disagree there - there's nothing incremental if your target ISA does not have a proper compiler. And a proper compiler equals $$$ in this case.

While what you say is true (to my knowledge), it is not the whole story if I believe the specs I read online. For what I have read, you can compile targeting a generic machine x86 and just run it on the co-processor. You are just missing a lot of features this way. Anyways, I bought one, so I'll try it and see.

[grok]

I'm not aware of any GCC developments to accommodate KNC ISA support. On the other hand, the upcoming KNL will see Clang/LLVM support since day one, but that's a completely different product.

This is the biggest problem with it and it's strange that it's not so much mentioned in comments or in all places of all, the Phoronix story. The Xeon Phi card on sale is deprecated.

It's dead, no one will ever bother with it. Don't buy dead hardware. You can as well get a Radeon 4870X2 to do GPGPU, or an old GT200 Tesla (a GTX 280 with 4GB and no video output) and program with outdated APIs and tools. Obtaining the tools will be easier at least but that's fairly pointless. And Xeon Phi is worse since nobody else than you will be able to run your code.

[darkblu]

While what you say is true (to my knowledge), it is not the whole story if I believe the specs I read online. For what I have read, you can compile targeting a generic machine x86 and just run it on the co-processor.

Yes, you can. What I've been saying is that by doing that you'll be missing on the board's main purpose - FLOPS.

You are just missing a lot of features this way. Anyways, I bought one, so I'll try it and see.

Well, enjoy it then. Let us know how it went.

[chuckleb]

Regarding the Intel compiler requirement, the developer program that these cards are offered under gives you 6 months of Intel compiler access for free. In addition, if you are a student (.edu email), you can get free licenses to the software stack as well (https://software.intel.com/en-us/int...ion-offerings/).

The program is really trying to get more people to play with them and see if they could be used in the workflow. It's not easy getting any coprocessor working out of the box, you have to work at it and the more of the code base that is in-house developed, the better the likelihood that you can get these cards to work well with it.