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Libre RISC-V Snags $50k EUR Grant To Work On Its RISC-V 3D GPU Chip

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  • Libre RISC-V Snags $50k EUR Grant To Work On Its RISC-V 3D GPU Chip

    Phoronix: Libre RISC-V Snags $50k EUR Grant To Work On Its RISC-V 3D GPU Chip

    The very ambitious project working on an open-source RISC-V architecture to serve as a Vulkan accelerator for 3D graphics secured a minor victory last week with receiving $50k EUR from the European Commission's Next Generation Internet initiative. They will be using these funds to allow for full-time engineering work and bounty-style tasks to work on this "100% libre RISC-V + 3D GPU chip for mobile devices."..

    http://www.phoronix.com/scan.php?pag...SC-V-50k-Grant

  • #2
    What does exactly "$50k EUR" means? The equivalent of 50k $ in EUR (around 44.376€) or 50k €?

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    • #3
      yay for technological independence!

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      • #4
        Originally posted by Buntolo View Post
        What does exactly "$50k EUR" means? The equivalent of 50k $ in EUR (around 44.376€) or 50k €?
        It's a typo, it is €50000.

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        • #5
          Unfortunately that's peanuts. Designing a capable GPU is a year-long effort for a team of skilled engineers. 50K only pays a single engineer for a few months. And I still don't trust any efforts lead by lkcl after what has happened in the past. Let's hope the money will be put to good use, but I'm very skeptical about it.

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          • #6
            Thing to remember they are doing this at 28nm noted here https://www.crowdsupply.com/libre-ri...class/updates/.

            So this at silicon production level is like 8 years behind current. Makes sense to target this old production method for production of prototype silicon as it cost effective. Problem is it not performance or power effective. So 2.5 watts at 28nm same design done at current 14nm or 7nm will use a lot less power than that as well as increasing through put without changing anything.

            When you compare the performance of this to 8 year old options in performance per watt is really not bad at all.

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            • #7
              Originally posted by brent View Post
              Unfortunately that's peanuts. Designing a capable GPU is a year-long effort for a team of skilled engineers. 50K only pays a single engineer for a few months. And I still don't trust any efforts lead by lkcl after what has happened in the past. Let's hope the money will be put to good use, but I'm very skeptical about it.
              Something interesting is a lot of risc-v tap out have only taken a single skilled engineer. Its going to be interesting to watch. Designing a capable GPU is a year-long effort getting a prototype up to prove if a ISA design can work in the real world is not. This project would be a stage one chip with a single tap out. Capable GPU you talking normally 10 to 12 silicon tap out stages refining the design. So its not exactly a year long effort from a team.

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              • #8
                Originally posted by brent View Post
                Unfortunately that's peanuts. Designing a capable GPU is a year-long effort for a team of skilled engineers. 50K only pays a single engineer for a few months. And I still don't trust any efforts lead by lkcl after what has happened in the past. Let's hope the money will be put to good use, but I'm very skeptical about it.
                Since we're working on this as a way to make a libre GPU rather than a way to make lots of money, the money will last for more than a year, supporting both lkcl and me.

                If anyone's interested, we can most likely pay them some for working on the project.

                Participation, or other forms of contribution are welcome.

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                • #9
                  Since the grant money is handed out on a per-completed-task basis, if we run out earlier, that means, yay, we finished getting it working earlier.

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                  • #10
                    Is it possible to "refactor" it from 28 nm to 7 nm?
                    How much work is that?

                    Besides primitive operations, will it support hardware-accelerated cryptography and encoding? Such as AES-256 or AV1 decoding?
                    Besides a basic instruction set, will it support advanced instructions like those in SSE4, FMA and AVX-512?
                    Will it support virtualization?

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