There's A New Libre GPU Effort Building On RISC-V, Rust, LLVM & Vulkan

[cb88]

If you had done any research, or Googled it, you'd know that they're not just doing hard disk controllers with RISC-V, but I won't spoil the surprise for you.

I did... what they are doing still falls in the class of micro controller... They could have already been doing stuff like this with their current controllers.

[microcode]

Quite the understatement considering one of the first, if not the first, risc-v implementations was nVidia's NV-RISCV as used in their GPUs following ~2016: https://riscv.org/wp-content/uploads...V_Story_V2.pdf https://riscv.org/wp-content/uploads...ijstermans.pdf

NVIDIA is using it in an embedded controller, not the shader cores.

[microcode]

Hard disk controllers *are* "stupid microcontrollers" .... They at best do a little signal processing probably mostly in hardware and logging of errors and cache management.

If you had done any research, or Googled it, you'd know that they're not just doing hard disk controllers with RISC-V, but I won't spoil the surprise for you.

[onicsis]

This is a similar setup to something that Esperanto Technologies said they had prototyped. There's really nothing about RISC-V that prevents you from using it as a GPU base ISA.

What I think would be interesting is an architecture which is not completely like most GPUs, which would basically be a set of full system cores with some graphics functionality, in addition to non-graphics cores. If your process uses the graphics functionality, it traps and is scheduled on a graphics-optimized core. These cores would have special stuff like MMU views to do interpolation and texture swizzles and decoding, datatypes appropriate for graphics available to vector runs. You'd still want fixed functions for rasterization, fragment blending, etc., but maybe a middle ground has some value.

Intel Larrabee general purpose graphics card GPGPU

[cb88]

Shh now oiaohm will come how Western Digital funds massively in RISC-V for clearly use-cases other than a stupid microcontroller.

Hard disk controllers *are* "stupid microcontrollers" .... They at best do a little signal processing probably mostly in hardware and logging of errors and cache management.

[Weasel]

Probably the drivers don't even interact with it at all except perhaps for power management type stuff, or negotiating trust of certain things, it's basically doing the same job that the embedded controller does in modern CPUs (ARM Trustzone on AMD / Arc or Sparc others on Intel). It's litereally just an isolated little microcontroller in there that they can program to do menial tasks.

Shh now oiaohm will come how Western Digital funds massively in RISC-V for clearly use-cases other than a stupid microcontroller.

[Michael]

Probably the drivers don't even interact with it at all except perhaps for power management type stuff, or negotiating trust of certain things, it's basically doing the same job that the embedded controller does in modern CPUs (ARM Trustzone on AMD / Arc or Sparc others on Intel). It's litereally just an isolated little microcontroller in there that they can program to do menial tasks.

Yep right that's my expectation of it as well, far from RISC-V NV being anything actually doing any graphics/compute work.

[cb88]

Their Falcon/RISC-V control processor AFAIK is just being used to bring-up the GPU itself and some system management type purposes but not actually doing any of the graphics/compute.

https://www.phoronix.com/scan.php?pa...ext-Gen-Falcon

Probably the drivers don't even interact with it at all except perhaps for power management type stuff, or negotiating trust of certain things, it's basically doing the same job that the embedded controller does in modern CPUs (ARM Trustzone on AMD / Arc or Sparc others on Intel). It's litereally just an isolated little microcontroller in there that they can program to do menial tasks.

[Weasel]

Damn, both RISC-V and Rust in the same title. Dead on announcement.

[Michael]

True. But that's most of the silicon logic anyhow considering the rest of the cores just do raw compute... no? I mean, there's a reason they insist on keeping the microcode closed and don't care about the rest being out there. I think?

Their Falcon/RISC-V control processor AFAIK is just being used to bring-up the GPU itself and some system management type purposes but not actually doing any of the graphics/compute.

https://www.phoronix.com/scan.php?page=news_item&px=NVIDIA-RISC-V-Next-Gen-Falcon