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Allwinner ARM Boards With SATA See Big Speed Boost From Single Line Patch

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  • wizard69
    replied
    Originally posted by andreano View Post

    Mind blown!

    Glad to hear that NXP is in the "good" category with TI, as I've sponsored them both privately and professionally.
    I suspect that the reason NXP and TI are more successful is their very long histories in the embedded world. If a good part of your business revolves around selling parts to industries that use those parts in very creative ways, then you pretty much have to be open. TI for example has complete chip sets designed for use in multi meters. NXP has very interesting chips for the auto industry which would be useless if engineers couldn’t access the hardware. In a nut shell they have product that is nothing but sand if the buyers can’t access the specialized hardware on chip.

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  • wizard69
    replied
    Originally posted by Raka555 View Post
    I wish they would come up with some "VESA standard" or something which dictates how some basic accelerated functions should work and everyone should have those as a minimum and then they can do whatever fancy stuff they like in whatever way they want on top of that.
    This is where I have hopes that a manufacture will introduce mass production ARM based PC. If successful it could define a hardware mapping others could build off. Right now we don’t have anybody that has the drive to do this even if the likes of MS seemed to be moving in that direction. I’m starting to loose hope that a high volume ARM based system, that is open, will ever appear.

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  • pal666
    replied
    Originally posted by LoveRPi View Post
    This is factually incorrect. RPi is one of the more closed ecosystems. Closed source firmware and proprietary lockout such as DSI and 8MP CSI.
    this is factually incorrect. rpi is the most open arm. firmware is hardware's implementation detail and all hardware is closed. but rpi has documentation and mainline drivers produced by vendor, unlike chinese shit which relies on someone doing reverse engineering

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  • andreano
    replied
    Originally posted by willmore View Post
    the vendor will sometimes scramble the order in which registers are addressed—maybe in some attempt to hide that they stole the IP?

    In the case of this SATA driver, what the author did was realize that the Allwinner chips used the same IP for their SATA interface as TI did. But, where Allwinner didn't document the hardware well, TI did.
    Mind blown!

    Glad to hear that NXP is in the "good" category with TI, as I've sponsored them both privately and professionally.
    Last edited by andreano; 05-15-2019, 03:26 PM.

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  • elatllat
    replied
    Originally posted by LoveRPi View Post

    This is factually incorrect. RPi is one of the more closed ecosystems. Closed source firmware and proprietary lockout such as DSI and 8MP CSI.
    Yes technically the RPI has closed portions, but it has an open GPU and good vendor support which is more than most alternatives https://hackaday.com/2014/02/28/rasp...y-for-quake-3/

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  • LoveRPi
    replied
    Originally posted by elatllat View Post
    Why do SOC venders still think NDAs and blobs without source are profitable? The most open SBC vender (rpi) soled 20 million units. The second best supported SBC vender (Odroid) sells out. RISC-V can't come soon enough.
    This is factually incorrect. RPi is one of the more closed ecosystems. Closed source firmware and proprietary lockout such as DSI and 8MP CSI.

    ODROID puts proprietary lockout in their software as well such as their ATF and images.
    Last edited by LoveRPi; 05-15-2019, 02:57 PM.

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  • DoMiNeLa10
    replied
    Originally posted by ldesnogu View Post
    It's not because RISC-V is "open" that chips using it, be they CPU or complete SoC, will be open too.
    The license is permissive, so you can expect companies to take the design and modify it in such a way that they'll have effective monopoly on software for their chips.

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  • ldesnogu
    replied
    Originally posted by elatllat View Post
    Why do SOC venders still think NDAs and blobs without source are profitable? The most open SBC vender (rpi) soled 20 million units. The second best supported SBC vender (Odroid) sells out. RISC-V can't come soon enough.
    It's not because RISC-V is "open" that chips using it, be they CPU or complete SoC, will be open too.

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  • andyprough
    replied
    Originally posted by elatllat View Post
    Why do SOC venders still think NDAs and blobs without source are profitable? The most open SBC vender (rpi) soled 20 million units. The second best supported SBC vender (Odroid) sells out. RISC-V can't come soon enough.
    Maybe they see it as a way to try to hide their patent infringing and license infringing hackery? I'm just spitballing here...

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  • willmore
    replied
    Originally posted by polarathene View Post
    Not knowing much about what's going on myself with that change, did the dev submitting the patch explain/document it? I'd assume changing the bits to different values like that if not standard/spec could cause unexpected problems elsewhere? They cited Intel and TI according to the article, but there's no other information about it, was it just trying different values and choosing one that gave the best I/O results?
    The basic situation is that there are many vendors of IP blocks like SATA interfaces, etc. Designware is a popular one, but there are quite a few. How they license things to chip designers is opaque to me, but the behavior of the designers seems to follow a few clear paths:
    1) Fully licensed the IP docs and all. Publishes full docs for their chips (TI, NXP, ST, etc.)
    2) Some kid of licensing, but no docs or poor docs. (Samsung, Rockchip (sorta), etc.)
    3) Not sure they licensed the IP at all, maybe they stole it or coppied it or someone found something lying around and used it. No meaningful docs if any. Often 'docs' are just a cut and paste from some generic document found elsewhere. (Allwinner, Rockchip (mostly), MediaTek, etc.)

    This leads to some odd behavior. Normally drivers for 1 get done first--there's docs, they're accurate, the vendor is often helpful, etc. Then there are the other groups. Often a good deal of RE is required to write a driver or--if you're 'lucky'--there's a BSP dumped somewhere using an ancient kernel which can be used as a source of 'documentation'. This often leads to a poorly written driver--not the fault of the author, but there's 'magic bits' in the original code and there's nothing they can do to explain things that weren't explained to them.

    In this latter scenario, it's not uncommon to find out that you just wrote a driver that's almost identical to an existing one! That often gets caught in the code reviews done prior to merging. it can be extremely frustrating for the author to be told "why did you rewrite an existing driver?" If they don't give up in frustation, they will often adapt the existing driver to support their hardware--often by adding quirks or other patches for the foibles of the newer chip. This is really common in case 3 where the vendow will sometimes scramble the order in which registers are addressed--maybe in some attempt to hide the that they stole the IP?

    In the case of this SATA driver, what the author did was realize that the Allwinner chips used the same IP for their SATA interface as TI did. But, where Allwinner didn't document the hardware well, TI did. So, they poked through the TI docs and found some parts that were missing from the Allwinner docs. Since this register wasn't documented in the proper vendor docs, yes, there could be problems with messing with it. Fortunately, there's been a lot of people with SBCs using this IP who are testing things to ensure there are no regressions.

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