Google's Octopus Is A Gemini Lake Chromebook

[linuxgeex]

Chromebooks have soldered RAM usually.
Though I wonder if anyone tried to install ECC memory in the HP Envy x360 or ASUS GL702ZC.

Actually, you need to revert one small kernel patch that disables forcing ECC on Ryzen, then you can enable ECC even without mobo support.

I think you still need motherboard support - unless I'm mistaken parity errors are handled by the motherboard. If there was no need for motherboard support then a pin-compatible ECC DIMM would do its job regardless of whether the motherboard or CPU was aware of whether it was even an ECC part. I guess if the memory controller is in the SOC then that is the same thing as mobo support though, so you may be right.

The google foo jury is out as far as a simple yes/no is concerned. I thought I found an answer but it was DDR4 command/address parity checking (bus parity) not ECC.

Aha... so the data bus is 72 bits - 64 for data, 8 for ECC. In non-ECC DIMMs the extra 8 bits are used for address/command parity. These features are mutually exclusive. Either you have non-ECC DIMMs with command/address parity, or you have ECC DIMMs with error correcting codes. The mode is controlled via a single trace - PARITY and reporting is via the ERROR_N trace. The modality is controlled by the memory controller. So yes, the Ryzen cores with integrated memory controller can switch between ECC and non-ECC in software so long as the motherboard extends the PARITY trace to the sockets. Otherwise the socket will be locked in one mode or the other.

So jury is still out because we don't know whether that trace exists on the Octopus mobo.

[My8th]

Is it because it has 8 threads?

Current Gemini Lakes only have upto 4 threads from what I could find.

[chithanh]

I think you still need motherboard support

So jury is still out because we don't know whether that trace exists on the Octopus mobo.

The traces exist I'm sure. The only thing holding up ECC on AM2/AM3/AM4 was lack of BIOS support. But that could be rectified in 100% of cases by forcing ECC through amd_edac. Until a patch was submitted that disabled the override in Ryzen.