RISC-V Port Lands In GCC 7 Codebase
Written by Michael Larabel in GNU on 6 February 2017 at 05:18 PM EST. 4 Comments
GNU --
Last month the RISC-V GCC port was approved for landing in GCC 7 while today that merge finally happened.

The RISC-V GCC port has been a work in progress for a long time and was held up by university lawyers while that was all cleared up, the code went through a few rounds of code revisions, and the steering committee approved landing RISC-V support even as the codebase has moved onto only bug/regression fixes. Today all of that code finally was merged into the GCC7 code-base.

There was the new port, libgcc changes and several other patches landing this code into the GNU Compiler Collection 7.

GCC 7 is expected for release in the next month or two. RISC-V is a promising, royalty-free processor ISA and the compiler port for it supports version 2.0 of the RV32I and RV64I ISAs. Learn more about this open-source processor ISA at RISCV.org.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 10,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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