The Intel i965 Mesa DRI driver support has popped up in a Git code branch named Broadwell. The user-space driver support spans across nearly 50 patches and affects a great deal of the Mesa driver.
In digging through the code commits on Sunday afternoon, here's some quick comments:
- Right now there are GT1, GT2, and GT3 variants shown for the initial Broadwell processors. The Broadwell GT1 PCI IDs include 0x1602, 0x1606, 0x160A, 0x160B, 0x160D, and 0x160E. Broadwell GT2 PCI IDs are 0x1612, 0x1616, 0x161A, 0x161B, 0x161D, and 0x161E. Lastly, the high-end GT3 graphics for Broadwell are IDed as 0x1622, 0x1626, 0x162A, 0x162B, 0x162D, and 0x162E.
- Over Ivy Bridge / Haswell "Gen7" graphics, Broadwell "Gen8" claims support for a maximum of 280 VS threads over 36 on Gen7 hardware, a maximum of 256 GS threads over 36 on Gen7, and 64 WM threads over 48. The URB size has also quadrupled to 512 and the max VS entries supported are now 1664 over 512 and 640 GS entries over 192 on Gen7 hardware.
- BLORP and HiZ are temporarily disabled for Broadwell hardware right now but should be enabled in the coming months for faster performance.
- Broadwell has significant changes to the EU instruction encoding. Broadwell's new instruction encoding has also meant having to write a gen shader disassembler for the DRI driver.
- There's new vec4 and fragment shader back-ends in the driver needed for Broadwell.
- Various other low-level driver changes were made for Broadwell's enablement.
More information on the Broadwell Mesa OpenGL driver changes can be found from the Git log.