Sadly there was no surprise announcement concerning the support moving along greatly, but rather a status overview of the different systems they have discovered on NVIDIA's graphics hardware for dealing with power management, performance monitoring, etc.
Power management has been a real pain for the reverse-engineering Nouveau camp since its partially software based, is almost entirely non-documented, and poorly studied/implemented in open-source, all because most vendors consider this to be a proprietary secret. Their optimal dynamic voltage / frequency scaling method they are going after is find performance bottlenecks using performance counters, lowering the clock on all other clock domains, lower the voltage on the other power domains based upon the clocks, increase the clock of the bottleneck clock domain, and then trying to do all of this quick enough and effective enough make a meaningful difference on power consumption without sacrificing performance.
Among the NVIDIA hardware counters that the project has exposed so far include PCOUNTER as blocks on monitor GPUs that monitor hardware events and tied to a given clock domain, MP counters that are per-channel/process counters in PGRAPH, PDAEMON as a set of four global counters with around 150 different signals that have been reverse-engineered so far. For PDAEMON there's five known signals and the MP counter GPGPU signals are believed to have been all reverse-engineered. Some of the Nouveau performance counters were only discovered this summer through the latest summer of code.
Nouveau open-source developers have also started understanding NVIDIA's PTHERM for thermal management, which is used for sending IRQs to the host when reaching temperature thresholds and can allow for certain events to happen (cutting GPU power, forcing the fan speed, etc). PDAEMON is what provides NVIDIA with its method of fan management, hardware scheduling, power gating, and performance/system monitoring and is found on all Fermi class GPUs and newer. Besides having its own performance counters, PDAEMON is also able to access all registers on the graphics card.
While these different hardware blocks have been discovered for NVIDIA power management, still to be implemented in the driver is stable re-clocking, dynamic voltage/frequency scaling algorithms, documenting the power/clock-gating details, and reverse-engineering more performance counter signals. This has been a big headache for Nouveau developers and end-users alike, but hopefully NVIDIA will begin to help out.
More details on this work can be found from the PDF slides and the video recording that's embedded below.