LLVM 3.3 Picks Up More Support For Intel AVX2
Beyond LLVM 3.3 having performance optimizations, one of many other features coming to this next compiler infrastructure update is greater support for Intel's AVX2 instruction set extensions.
AVX2 is the first major update to the Advanced Vector Extensions. AVX2 is also known as "Haswell New Instructions" and will be found in the Intel Haswell CPUs introduced in the coming months. AVX2 tacks in gather support, expands most integer AVX instructions to 256-bits, 3-operand FMA support, vector shifts, and other new functionality.
LLVM developers for a while have been working on Haswell/AVX2 support and there is some preliminary support to find in LLVM 3.2 (in fact, some early bits in LLVM 3.1) while the 3.3 release will provide more.
In recent days there has been some AVX2-related commits to the LLVM code-base. Some examples include RDSEED AVX2 and PREFETCHW code generation support.
There's also early AVX2/Haswell support within the recently released GCC 4.8 compiler.
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