I've been talking about Intel's Valley View SoC since being the first to widely expose it last March as a future Atom processor boasting Intel HD graphics rather than a graphics core derived from Imagination's PowerVR SGX IP. The open-source driver patches for "VLV" have been flowing for nearly one year and continue to be hacked on by the Intel Open-Source Technology Center team.
The latest bit of Valley View news to report on is that it looks like -- at least initially -- there are three planned variants. Committed today to the Mesa DRM library were the first real PCI IDs for Valley View graphics.
Up to this point there was just the 0x0f30 PCI product ID that is the "power on board" for initial Valley View development. Added on Saturday were three new PCI IDs: 0x0f31, 0x0f32, and 0x0f33. The define statements for these newly-recognized Valley View IDs just come down to PCI_CHIP_VALLEYVIEW_1, PCI_CHIP_VALLEYVIEW_2, and PCI_CHIP_VALLEYVIEW_3, but not any references to any "GT2" or other information to indicate the technical differences between the variants or how they might be marketed.
The three new Intel Valley View PCI IDs for the graphics were made public with this DRM commit.