For aiding in the debugging process and for improving the Radeon Gallium3D driver with regard to shader optimizations, Vadim Girlin is looking to have a shader disassembler within the driver itself.
Adding the disassembler to the Gallium3D driver is small and is only used when an environment variable is set, but adding the ISA information tables is what makes the work large due to all of the data about the different possible shader instructions. Vadim says, "I had the complete tables already prepared for other work on shader optimization, so I think that it makes sense to use other stuff as well while I'm at it."
In terms of the Radeon shader disassembler capabilities:
All bytecode structs now contain the indices of instruction records in the tables instead of native opcodes - this allows easy access to all related information in the tables - e.g. number of operands for alu instructions, native opcode for current chip class, etc. Also this allows to use single id for instruction even if it has different opcodes on different chips, that is, e.g. we don't have to check for all possible opcodes to say that current instruction is DOT4, we can simply compare alu->op with ALU_OP2_DOT4 constant that represents the index in the table, so this simplifies the processing of the shader code. Also alu table contains the information about allowed slots (vector/scalar) for different chip classes and some additional flags - e.g. instead of comparing some opcode with all possible KILLxx opcodes we can simply check the flag that is set in the table for all KILLxx instructions.Vadim is currently seeking comments on this R600g shader disassembler, per this mailing list thread. The Mesa branch containing the changes can be found in his r600-disasm Mesa Git branch. Tapping the shader disassembler is just a matter of setting the R600_DUMP_SHADERS environment variable to a value of 2 or 3 (the latter also provides the old shader dumps as if passing R600_DUMP_SHADERS=1 at present).