The Intel i965 Mesa DRI driver can now handle register spilling.
Register spilling is what happens when allocating variables but there are no longer enough registers available so some registers need to be placed (or "spilled") in RAM instead. Up to this point there hasn't been the support within the Intel Mesa driver so it would simply fail, while now it's able to use memory when out of registers. Update:
Daniel Vetter has clarified that the Intel driver has had register spilling support for the fragment shader already but that this is just for the VS.
Kenneth Graunke provided the patch to implement register spilling on the Mesa-dev mailing list
. This might also be back-ported to Mesa 9.0. "This is a candidate for the 9.0 branch. Even if it proves to have bugs, it's likely better than simply failing to compile."