The xf86-video-intel driver has picked up thousands of lines of new code today with the integration of a BRW assembler in order to compile shader programs on the fly and to remove inefficiencies and mistakes from current Intel shaders.
The thousands of lines of new code to the Intel X.Org driver comes once again via the prolific work of Chris Wilson
has he continues to advance the SNA acceleration architecture
This morning Chris first began by adding the BRW assembler
that tacked on 5,785 lines of new code. The code for this assembler isn't all new but some of which was pulled from the Intel Mesa driver.
In order to construct programs on the fly to cater for the combinatorial number of possible shaders, we need an assembler, whilst also taking the opportunity to remove some of the inefficiencies and mistakes from the current shaders.
Following that he had another commit
that added more than one thousand lines of new code that made SF and WM kernels compile using the new assembler. After that? Several more commits, this time to allow for compiling basic kernels at run-time when using SNA acceleration. The basic run-time compilation of kernels is for Gen 4/5/6/7/7 back-ends with Sandy Bridge New Acceleration.
The latest Intel driver commits can be viewed via CGit