Intel Core i7 AVX GCC Compiler Tuning Results

For those owners of Intel's latest-generation Core i3/i5/i7 "Sandy Bridge" processors, here's a quick look at the impact of some GCC tuning options specific to these latest AVX-enabled Intel processors.

When carrying out the recent Intel Sandy Bridge Shapes Up On GCC 4.7 Compiler benchmarks I conducted a few extra tests, which I had meant to put out earlier, but now with GCC 4.7 being released yesterday, it's a good time to go through these compiler optimizations on this 25th-anniversary GNU Compiler Collection release.

This testing was being done from the speedy Intel Core i7 3960X Sandy Bridge Extreme Edition system. The Core i7 3960X Sandy-E has six physical cores plus Hyper Threading and for this testing was overclocked to 4.5GHz. This system is a joy to work with -- especially for compiler testing -- since it can build the Linux kernel in under one minute. Ubuntu 12.04 LTS x86_64 with the Linux 3.2 kernel was running on the software side while built from source was the GCC 4.7 snapshot with --enable-lto and --enable-checking=release flags.

First up are some test results when building out some popular from-source test profiles with different -march= options. This Intel Core i7 Sandy Bridge processor was tested in its stock build configuration (generic), core2, corei7, and corei7-avx. The -march=corei7-avx option is most appropriate for Sandy Bridge since it enables the Advanced Vector Extensions support as well as the AES and PCLMUL instruction sets for Sandy Bridge. Here's the overview from the GCC i386/x86_64 options page:

`core2'
Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.
`corei7'
Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set support.
`corei7-avx'
Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support.

With the forthcoming Intel Ivy Bridge processors there is also the core-avx-i option that includes the Sandy Bridge (corei7-avx) options while also tacking in support for the new Ivy instruction sets: FSGSBASE, RDRND and F16C.

First up with the C-Ray test favorite, the -march= option yielding the biggest benefit was the proper corei7-avx option where as core2 and corei7-avx had minimal affect over the generic build.

Smallpt also had a small benefit out of the Core i7 optimizations with AVX.

Some GraphicsMagick tests also benefited, but not all of them.

Another option for Intel Sandy Bridge owners is to build out GCC with the --with-fpmath=avx configure switch. This option enables the GCC compilers to utilize AVX floating-point arithmetic.

Not many of the usual tests benefited from enabling this AVX floating-point math in the compiler, but producing noticeably results were the Fortran-written NAS Parallel Benchmarks from NASA. Some older GCC 4.6 AVX benchmarks remain available for those interested. Other compiler benchmarks from community members and other organizations continue to be made available over OpenBenchmarking.org.

Stay tuned for upcoming benchmarks of GCC 4.7 and LLVM/Clang 3.1. Those running their own compiler tests with the Phoronix Test Suite there are compiler reporting improvements if using 3.8-Bygland or newer.