The various open-source drops from Intel and AMD are coming this week due to the merge window for the Linux 3.4 kernel having just been opened, so the hardware vendors now want to get out their latest hardware enablement code so that it will be available during this next Linux kernel release, which will then work its way into Ubuntu 12.10, Fedora 18, etc.
The Haswell code push was quite surprising since it's mostly trivial. The Haswell graphics code is hitting the Ivy Bridge "Gen7" code-paths and the patches that have been published so far haven't contained any surprises, except for the small differences and Haswell isn't being introduced as "Gen8" graphics. However, there's interesting Ivy Bridge graphics news today and it concerns a "Valley View" codename,
Jesse Barnes of Intel's Open-Source Technology Center released a set of 25 patches to provide graphics support for Valley View? Well, what's Valley View? From one of the commit messages, "ValleyView is a CedarView-like chip but with an Ivybridge graphics core."
The CedarView Atoms were announced just a few months ago, but still depend upon PowerVR graphics. As I exclusively mentioned last month, Intel is planning to do away with PowerVR graphics. With Valley View, it looks like we have Cedar View performance and processor capabilities but with Intel Ivy Bridge graphics. The Ivy Bridge graphics performance should be very interesting, besides being much better for the fact that it's backed by an open-source, mainline driver. (Ivy Bridge should be 20~50%+ faster than Sandy Bridge.) Seeing Ivy Bridge graphics out of an Intel Atom will be very exciting!
As far as what else can be learned from the Valley View patches:
- At least initially, there will be a mobile and desktop variant. The mobile VGA PCI Ids are 0x0f30 and 0x0157 while the desktop part has an ID of 0x0155.
- Valley View will introduce something called the "Pondicherry" memory arbiter, with one of the kernel patches adding in support for Pondicherry's drain latency registers. "Valleyview SoC has a new memory arbiter and needs drain latency registers to be programmed. Each plane has a drain latency multiplier and a drain latency value."
- The Valley View SoC supports two DisplayPort panels. There's also HDMI output support.
- Valley View has a new interrupt architecture.
- Valley View (or "VLV" as referred to for short, just like IVB for Ivy Bridge) has a different Turbo Boost interface from the actual Ivy Bridge processors.
These Intel ValleyView SoC patches for the Linux graphics support right now are for the DRM kernel driver. The xf86-video-intel or Mesa DRI driver patches for this upcoming Intel Atom SoC have yet to surface, but since it's derived from Intel Sandy Bridge "Gen7", they probably won't be too exciting. The DDX driver, Mesa, and any libdrm changes also don't have any strict merge window they must comply with, unlike the Intel Direct Rendering Manager driver within the Linux kernel
As another Intel Haswell open-source update, the Mesa DRI driver support for the user-space OpenGL acceleration support has been pushed to a Mesa Haswell branch. Like the DRM changes, the Mesa changes for this initial Haswell hardware enablement are quite small and it's largely riding off the Ivy Bridge support work that's been going on now for the past year.
As far as other details about Intel's ValleyView, I'm not seeing much public information on this codenamed SoC at the moment. As soon as this plane lands, I hope to have out some more information. The Valley View patches meanwhile can currently be found on the intel-gfx mailing list and should be merged for the Linux 3.4 kernel.
Update 1: It looks like the ValleyView Atoms will offer up about 4x the performance of the current CedarView Atoms. Goodbye Atoms with PowerVR graphics! It looks like last month's report was spot-on.
Update 2: Valley View might be paired with a chipset dubbed "Balboa Pier."
Update 3: It sounds like Intel's ValleyView Atom SoC might not be released to the public until late 2012 or early 2013. The Intel Linux developers responsible for this driver support sound like they're still waiting for the actual silicon to arrive. More information on the ground; updates may also come via Twitter.