Intel's Linux GPU Driver Is Working To Move More Power Management Handling To Firmware
Written by Michael Larabel in Intel on 21 January 2016 at 08:09 AM EST. 22 Comments
INTEL --
An Intel engineer yesterday published the initial experimental patch-set for implementing GuC-based Single Loop Power Controller (SLPC) support.

This Single Loop Power Controller runs in the firmware on the GuC, the engine added to Skylake for workload scheduling and other tasks, with the firmware coming down as a binary blob to the disappointment of some open-source users. The patches by Intel's Tom O'Rourke explain that SLPC running on the firmware is set to replace some host-based power management features.


The GuC-based Single Loop Power Controller in its current form are designed to handle Dynamic FPS, Turbo, and Duty Cycle Control. Tom noted in the patch series, "DFPS adjusts requested graphics frequency to maintain target framerate. Turbo adjusts requested graphics frequency to maintain target GT busyness. DCC adjusts requested graphics frequency and stalls guc-scheduler to maintain actual graphics frequency in efficient range."

It's a massive set of 22 patches in an RFC state that add over one thousand lines of code to the Intel Linux kernel DRM driver for getting this GuC-based SLPC support wired up for Skylake and newer. More details via this patch series.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 10,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter or contacted via MichaelLarabel.com.

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