AMD Zen is the codename for AMD's new architecture that's a fresh design from the ground-up and the successor to AMD Excavator architecture. Zen is reportedly the x86_64 sister core architecture to go along with the 64-bit ARMv8-A K12 architecture.
Last week AMD published a "add znver1 processor" patch to the GNU Binutils package. This patch doesn't mention Zen explicitly but "znver1" is short for Zen after their long run of bdverX codenames within Binutils, GCC, etc, for indicating the Bulldozer architecture.
This patch reveals the AMD Zen design no longer supports TBM, FMA4, XOP, or LWP ISAs. Meanwhile the new ISA additions are for SMAP, RDSEED, SHA, XSAVEC, XSAVES, CLFLUSHOPT, and ADCX: ISAs are supported. It's nice to see with Zen that AMD will support the RDSEED instruction, which Intel has added since Broadwell for seeding another pseudorandom number generator. SMAP is short for the Supervisor Mode Access Prevention and is another Intel instruction set extension already supported by Linux.
AMD Zen also adds a new CLZERO instruction. This is a new one and "clzero instruction zero's out the 64 byte cache line specified in rax. Bits 5:0 of rAX are ignored."
The AMD zenver1 patch for Binutils was posted last week by an AMD developer to the binutils mailing list. Expect more AMD Zen patches for GCC and LLVM/Clang compilers, the Linux kernel, etc, in the months ahead.