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OpenBenchmarking.org

GCC 4.7 AMD Bulldozer Compiler Tuning

Michael Larabel

Published on 24 September 2012
Written by Michael Larabel
Page 1 of 4 - 9 Comments

As the latest AMD Bulldozer Linux benchmarks, here are updated figures on compiler tuning for the FX-8150 processor when using GCC 4.7.1.

This compiler testing on the AMD FX-8150 Bulldozer was done by using GCC 4.7.1 while swapping out the "-march=" compiler option value within the CFLAGS/CXXFLAGS. The march targets tested included nocona, core2, k8, k8-sse3, barcelona, and bdver1. Bdver1 is the native target for this first-generation AMD Bulldozer desktop processor. All other compiler flags were maintained the same during testing.

From the GCC documentation, the march options come down to:

nocona
Improved version of Intel Pentium 4 CPU with 64-bit extensions, MMX, SSE, SSE2 and SSE3 instruction set support.

core2
Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 instruction set support.

k8
Processors based on the AMD K8 core with x86-64 instruction set support, including the AMD Opteron, Athlon 64, and Athlon 64 FX processors. (This supersets MMX, SSE, SSE2, 3DNow!, enhanced 3DNow! and 64-bit instruction set extensions.)

k8-sse3
Improved versions of AMD K8 cores with SSE3 instruction set support.

barcelona
CPUs based on AMD Family 10h cores with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit instruction set extensions.)

bdver1
CPUs based on AMD Family 15h cores with x86-64 instruction set support. (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.)

This benchmarking occurred via the Phoronix Test Suite.

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