Intel Has More CXL Improvements Ready For Linux 6.3

Intel engineers continue carrying out much of the upstream Linux kernel enablement for the Compute Express Link (CXL) subsystem for supporting this high-speed open standard for servers. For the Linux 6.3 cycle is yet more feature work ready for the mainline kernel.

As I wrote about earlier this month, Intel engineers recently have been working on the CXL RAM region support and indeed this is part of the v6.3 pull request. The CXL RAM region enumeration and provisioning is so that the kernel can parse/update the CXL memory layout rather than relying upon the platform firmware for mapping CXL RAM regions as was required of prior kernel versions. This CXL RAM region enumeration for Linux 6.3 is also necessary for implementing end-to-end RAS flow for CXL memory in a future Linux kernel release.

Compute Express Link with Linux 6.3 also makes a soft reservation policy change for RAM-backed device DAX instances that they are now treated as "kmem" (kernel memory) rather than "device" so by default their platform memory is assigned to the core memory management rather than behind a device file. The policy can still be changed for those wanting CXL memory hot-added to be treated as a device DAX.

Linux 6.3 CXL also has improvements around event handling/reporting, support for emulating CXL DVSEC range registers as decoders to better support first-generation CXL devices, and various other fixes and improvements.

More details on the CXL changes with Linux 6.3 via this pull.