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DDR3 Memory Scaling Performance With AMD's Athlon 5350

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  • #41
    Originally posted by dungeon View Post
    Nah sorry , must point out i overlooked that i run 0.8.5 actually and compared it with results of 0.8.8 . So there is no actually any notable gain in games, stable overclock is only 150MHz plus for me that is plus 7% - all in all it is not really something to worry about if your board doesn't have it .
    You must compare results of several games....some might be more affected by this OC than others.

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    • #42
      Has anyone tried overclocking these systems with TurionPowerControl?
      My first impression of these little systems was of distrust, but they are looking better and better...

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      • #43
        Originally posted by Spittie View Post
        Just to point out a little thing, Jaguar has dedicated FPU for every core, while Steamroller/Piledriver have only a shared FPU for every two cores.
        It's not entirely fair to say the FPUs are "shared". Each dual-core "module" has a 256-bit wide SIMD unit. Each core can execute 128-bit SSE (or 64-bit MMX) instructions independently. It's only shared when executing 256-bit AVX instructions. But considering that software will increasingly use these wide instructions, I suppose it might as well be shared.

        As bridgman alluded to, AMD sees a future where most heavy lifting (especially floating point) is done by the GPU, which doubles as a kind of co-processor. That's been the goal behind APUs, HSA, etc.

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        • #44
          Originally posted by Imroy View Post
          It's not entirely fair to say the FPUs are "shared". Each dual-core "module" has a 256-bit wide SIMD unit. Each core can execute 128-bit SSE (or 64-bit MMX) instructions independently. It's only shared when executing 256-bit AVX instructions. But considering that software will increasingly use these wide instructions, I suppose it might as well be shared.

          As bridgman alluded to, AMD sees a future where most heavy lifting (especially floating point) is done by the GPU, which doubles as a kind of co-processor. That's been the goal behind APUs, HSA, etc.
          Oh, c'mon, you get what I mean
          The hardware is shared, but obviously a core can use half of it and leave the other half to the other core.
          There is also the scheduler behind that might bottleneck, but I remember AMD claiming to have fixed that with Steamroller.

          I know that this is the current AMD plain, and it's a smart one. I just think that they should have waited until more software was ready for gpgpu, hsa.
          Not that it really matter, as most of the normal workflow is about integers, but still.

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