Hi,
In displayport mode, the DCPLL defaults to 600MHz for DCE4 and 540MHz for DCE5.
When programming the video mode for a crtc, SetPixelClock command table is used.
What are the parameters really used for this command table to program the crtc virtual pixel clock (as stated in radeon_atom_pick_pll)?
In displayport mode, the DCPLL defaults to 600MHz for DCE4 and 540MHz for DCE5.
When programming the video mode for a crtc, SetPixelClock command table is used.
What are the parameters really used for this command table to program the crtc virtual pixel clock (as stated in radeon_atom_pick_pll)?
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