Originally posted by RussianNeuroMancer
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Code:
# aticonfig --adapter=all --cfd # mv /etc/X11/xorg.conf /etc/X11/xorg.conf.old # aticonfig --adapter=0,1 --initial # reboot (in ubuntu shutdown -r now assuming your in tty*)
From terminal or menu load amdcccle as root/super user If you you're not using more than on screen in may prompt you that it has to make changes let it do so. Also while you're there see if you have a Crossfire expandable menu
I've been told by a few people that you can enable it straight from there is so great do so then reboot.
The automatic changes basically removes "right of 0 0" in the server layout section which you need because because either you're going to run in a Big Desktop mode or and mutli desktop mode.
That's why you're seeing the 0:0:0 which isn't the correct BUS ID for your adapters. instead of:
Code:
Candidate Combination: Master: 0:0:0 Slave: 0:0:0 CrossFire is disabled on current device CrossFire Diagnostics: CrossFire can work with P2P mapping through GART
Code:
Candidate Combination: Master: 0:1:0 Slave: 1:0:0 CrossFire is disabled on current device CrossFire Diagnostics: CrossFire can work with P2P mapping through GART
Code:
amdconfig --lsch CrossFire chain for adapter 0, status: enabled 0. 00:01.0 AMD Radeon HD 6620G 1. 01:00.0 AMD Radeon 6600M and 6700M Series
Code:
Candidate Combination: Master: 0:1:0 Slave: 1:0:0 CrossFire is disabled on current device CrossFire Diagnostics: CrossFire can work with P2P mapping through GART
Like:
Code:
~ $ aticonfig --lsch CrossFire chain for adapter 0, status: enabled 0. 03:00.0 ATI Radeon HD 5900 Series 1. 04:00.0 ATI Radeon HD 5900 Series ~ $ aticonfig --lscs Candidate Combination: Master: 3:0:0 Slave: 4:0:0 CrossFire is disabled on current device CrossFire Diagnostics: CrossFire can work with P2P mapping through GART Dongle Capabilities: support PASSTHROUGH |INTERLINK_SW_AFR | INTERLINK_AUTO_AFR | INTERLINK_BLACKING | INTERLINK_SUPERAA Candidate Combination: Master: 3:0:0 Slave: 4:0:0 CrossFire is disabled on current device CrossFire Diagnostics: CrossFire can work with P2P mapping through GART Dongle Capabilities: support PASSTHROUGH |INTERLINK_SW_AFR | INTERLINK_AUTO_AFR | INTERLINK_BLACKING | INTERLINK_SUPERAA Candidate Combination: Master: 3:0:0 Slave: 4:0:0 CrossFire is disabled on current device CrossFire Diagnostics: CrossFire can work with P2P mapping through GART Dongle Capabilities: support PASSTHROUGH |INTERLINK_SW_AFR | INTERLINK_AUTO_AFR | INTERLINK_BLACKING | INTERLINK_SUPERAA
Code:
kernel /vmlinuz real_root=/dev/sda3 iommu=off
If someone on the forums here, possibly a Developer or someone very knowledgeable in IOMMU devices and settings can explain and save me, you, and future users allot of time it would be appreciated =P
Here of some of the known options I know of but I'm not sure if their all related in the sense that AMD64 IOMMU embedded options are the same for amd_iommu and visa versa as I said when I get time I will research it further.
AMD64 Embedded IOMMU:
IOMMU (input/output memory management unit)
Currently four x86-64 PCI-DMA mapping implementations exist:
1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
(e.g. because you have < 3 GB memory).
Kernel boot message: "PCI-DMA: Disabling IOMMU"
2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
Kernel boot message: "PCI-DMA: using GART IOMMU"
3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
e.g. if there is no hardware IOMMU in the system and it is need because
you have >3GB memory or told the kernel to us it (iommu=soft))
Kernel boot message: "PCI-DMA: Using software bounce buffering
for IO (SWIOTLB)"
4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
pSeries and xSeries servers. This hardware IOMMU supports DMA address
mapping with memory protection, etc.
Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
[,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
[,noaperture][,calgary]
General iommu options:
off Don't initialize and use any kind of IOMMU.
noforce Don't force hardware IOMMU usage when it is not needed.
(default).
force Force the use of the hardware IOMMU even when it is
not actually needed (e.g. because < 3 GB memory).
soft Use software bounce buffering (SWIOTLB) (default for
Intel machines). This can be used to prevent the usage
of an available hardware IOMMU.
iommu options only relevant to the AMD GART hardware IOMMU:
<size> Set the size of the remapping area in bytes.
allowed Overwrite iommu off workarounds for specific chipsets.
fullflush Flush IOMMU on each allocation (default).
nofullflush Don't use IOMMU fullflush.
leak Turn on simple iommu leak tracing (only when
CONFIG_IOMMU_LEAK is on). Default number of leak pages
is 20.
memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order.
(default: order=1, i.e. 64MB)
merge Do scatter-gather (SG) merging. Implies "force"
(experimental).
nomerge Don't do scatter-gather (SG) merging.
noaperture Ask the IOMMU not to touch the aperture for AGP.
forcesac Force single-address cycle (SAC) mode for masks <40bits
(experimental).
noagp Don't initialize the AGP driver and use full aperture.
allowdac Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
DAC is used with 32-bit PCI to push a 64-bit address in
two cycles. When off all DMA over >4GB is forced through
an IOMMU or software bounce buffering.
nodac Forbid DAC mode, i.e. DMA >4GB.
panic Always panic when IOMMU overflows.
calgary Use the Calgary IOMMU if it is available
iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
implementation:
swiotlb=<pages>[,force]
<pages> Prereserve that many 128K pages for the software IO
bounce buffering.
force Force all IO through the software TLB.
Settings for the IBM Calgary hardware IOMMU currently found in IBM
pSeries and xSeries machines:
calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
calgary=[translate_empty_slots]
calgary=[disable=<PCI bus number>]
panic Always panic when IOMMU overflows
64k,...,8M - Set the size of each PCI slot's translation table
when using the Calgary IOMMU. This is the size of the translation
table itself in main memory. The smallest table, 64k, covers an IO
space of 32MB; the largest, 8MB table, can cover an IO space of
4GB. Normally the kernel will make the right choice by itself.
translate_empty_slots - Enable translation even on slots that have
no devices attached to them, in case a device will be hotplugged
in the future.
disable=<PCI bus number> - Disable translation on a given PHB. For
example, the built-in graphics adapter resides on the first bridge
(PCI bus number 0); if translation (isolation) is enabled on this
bridge, X servers that access the hardware directly from user
space might stop working. Use this option if you have devices that
are accessed from userspace directly on some PCI host bridge.
Currently four x86-64 PCI-DMA mapping implementations exist:
1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
(e.g. because you have < 3 GB memory).
Kernel boot message: "PCI-DMA: Disabling IOMMU"
2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
Kernel boot message: "PCI-DMA: using GART IOMMU"
3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
e.g. if there is no hardware IOMMU in the system and it is need because
you have >3GB memory or told the kernel to us it (iommu=soft))
Kernel boot message: "PCI-DMA: Using software bounce buffering
for IO (SWIOTLB)"
4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
pSeries and xSeries servers. This hardware IOMMU supports DMA address
mapping with memory protection, etc.
Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
[,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
[,noaperture][,calgary]
General iommu options:
off Don't initialize and use any kind of IOMMU.
noforce Don't force hardware IOMMU usage when it is not needed.
(default).
force Force the use of the hardware IOMMU even when it is
not actually needed (e.g. because < 3 GB memory).
soft Use software bounce buffering (SWIOTLB) (default for
Intel machines). This can be used to prevent the usage
of an available hardware IOMMU.
iommu options only relevant to the AMD GART hardware IOMMU:
<size> Set the size of the remapping area in bytes.
allowed Overwrite iommu off workarounds for specific chipsets.
fullflush Flush IOMMU on each allocation (default).
nofullflush Don't use IOMMU fullflush.
leak Turn on simple iommu leak tracing (only when
CONFIG_IOMMU_LEAK is on). Default number of leak pages
is 20.
memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order.
(default: order=1, i.e. 64MB)
merge Do scatter-gather (SG) merging. Implies "force"
(experimental).
nomerge Don't do scatter-gather (SG) merging.
noaperture Ask the IOMMU not to touch the aperture for AGP.
forcesac Force single-address cycle (SAC) mode for masks <40bits
(experimental).
noagp Don't initialize the AGP driver and use full aperture.
allowdac Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
DAC is used with 32-bit PCI to push a 64-bit address in
two cycles. When off all DMA over >4GB is forced through
an IOMMU or software bounce buffering.
nodac Forbid DAC mode, i.e. DMA >4GB.
panic Always panic when IOMMU overflows.
calgary Use the Calgary IOMMU if it is available
iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
implementation:
swiotlb=<pages>[,force]
<pages> Prereserve that many 128K pages for the software IO
bounce buffering.
force Force all IO through the software TLB.
Settings for the IBM Calgary hardware IOMMU currently found in IBM
pSeries and xSeries machines:
calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
calgary=[translate_empty_slots]
calgary=[disable=<PCI bus number>]
panic Always panic when IOMMU overflows
64k,...,8M - Set the size of each PCI slot's translation table
when using the Calgary IOMMU. This is the size of the translation
table itself in main memory. The smallest table, 64k, covers an IO
space of 32MB; the largest, 8MB table, can cover an IO space of
4GB. Normally the kernel will make the right choice by itself.
translate_empty_slots - Enable translation even on slots that have
no devices attached to them, in case a device will be hotplugged
in the future.
disable=<PCI bus number> - Disable translation on a given PHB. For
example, the built-in graphics adapter resides on the first bridge
(PCI bus number 0); if translation (isolation) is enabled on this
bridge, X servers that access the hardware directly from user
space might stop working. Use this option if you have devices that
are accessed from userspace directly on some PCI host bridge.
inttest= [IA64]
iommu=option[,option..] [X86-64]
off Disable IOMMU.
force Unconditionally enable IOMMU.
noforce Disable IOMMU and IOMMU merging, by default.
biomerge Unconditionally enable IOMMU, IOMMU merging,
and set BIO IOMMU vmerge boundary to 4096.
panic Panic on IOMMU overflow.
nopanic Do not panic on IOMMU overflow.
merge Unconditionally enable IOMMU, IOMMU merging.
nomerge Disable IOMMU merging.
forcesac Force single address cycle (SAC, 32-bit).
allowdac Permit dual address cycle (DAC, 64-bit).
nodac Forbid dual address cycle (DAC, 64-bit).
soft Enable swiotlb.
calgary Use Calgary IOMMU.
(GART-only options follow...)
<NNN> Specify size of remapping area.
fullflush Disable optimizing flushing strategy.
nofullflush Enable optimizing flushing strategy.
noagp Use entire aperture, AGP isn't using it.
noaperture Disable aperture fixups / hole init.
memaper=<N> malloc an aperture of order N.
iommu=option[,option..] [X86-64]
off Disable IOMMU.
force Unconditionally enable IOMMU.
noforce Disable IOMMU and IOMMU merging, by default.
biomerge Unconditionally enable IOMMU, IOMMU merging,
and set BIO IOMMU vmerge boundary to 4096.
panic Panic on IOMMU overflow.
nopanic Do not panic on IOMMU overflow.
merge Unconditionally enable IOMMU, IOMMU merging.
nomerge Disable IOMMU merging.
forcesac Force single address cycle (SAC, 32-bit).
allowdac Permit dual address cycle (DAC, 64-bit).
nodac Forbid dual address cycle (DAC, 64-bit).
soft Enable swiotlb.
calgary Use Calgary IOMMU.
(GART-only options follow...)
<NNN> Specify size of remapping area.
fullflush Disable optimizing flushing strategy.
nofullflush Enable optimizing flushing strategy.
noagp Use entire aperture, AGP isn't using it.
noaperture Disable aperture fixups / hole init.
memaper=<N> malloc an aperture of order N.
amd_iommu= [HW,X86-84]
Pass parameters to the AMD IOMMU driver in the system.
Possible values are:
fullflush - enable flushing of IO/TLB entries when
they are unmapped. Otherwise they are
flushed before they will be reused, which
is a lot of faster
off - do not initialize any AMD IOMMU found in
the system
Pass parameters to the AMD IOMMU driver in the system.
Possible values are:
fullflush - enable flushing of IO/TLB entries when
they are unmapped. Otherwise they are
flushed before they will be reused, which
is a lot of faster
off - do not initialize any AMD IOMMU found in
the system
intel_iommu= [DMAR] Intel IOMMU driver (DMAR) option
on
Enable intel iommu driver.
off
Disable intel iommu driver.
igfx_off [Default Off]
By default, gfx is mapped as normal device. If a gfx
device has a dedicated DMAR unit, the DMAR unit is
bypassed by not enabling DMAR with this option. In
this case, gfx device will use physical address for
DMA.
forcedac [x86_64]
With this option iommu will not optimize to look
for io virtual address below 32 bit forcing dual
address cycle on pci bus for cards supporting greater
than 32 bit addressing. The default is to look
for translation below 32 bit and if not available
then look in the higher range.
strict [Default Off]
With this option on every unmap_single operation will
result in a hardware IOTLB flush operation as opposed
to batching them for performance.
sp_off [Default Off]
By default, super page will be supported if Intel IOMMU
has the capability. With this option, super page will
not be supported.
intremap= [X86-64, Intel-IOMMU]
Format: { on (default) | off | nosid }
on enable Interrupt Remapping (default)
off disable Interrupt Remapping
nosid disable Source ID checking
inttest= [IA64]
iomem= Disable strict checking of access to MMIO memory
strict regions from userspace.
relaxed
iommu= [x86]
off
force
noforce
biomerge
panic
nopanic
merge
nomerge
forcesac
soft
pt [x86, IA64]
on
Enable intel iommu driver.
off
Disable intel iommu driver.
igfx_off [Default Off]
By default, gfx is mapped as normal device. If a gfx
device has a dedicated DMAR unit, the DMAR unit is
bypassed by not enabling DMAR with this option. In
this case, gfx device will use physical address for
DMA.
forcedac [x86_64]
With this option iommu will not optimize to look
for io virtual address below 32 bit forcing dual
address cycle on pci bus for cards supporting greater
than 32 bit addressing. The default is to look
for translation below 32 bit and if not available
then look in the higher range.
strict [Default Off]
With this option on every unmap_single operation will
result in a hardware IOTLB flush operation as opposed
to batching them for performance.
sp_off [Default Off]
By default, super page will be supported if Intel IOMMU
has the capability. With this option, super page will
not be supported.
intremap= [X86-64, Intel-IOMMU]
Format: { on (default) | off | nosid }
on enable Interrupt Remapping (default)
off disable Interrupt Remapping
nosid disable Source ID checking
inttest= [IA64]
iomem= Disable strict checking of access to MMIO memory
strict regions from userspace.
relaxed
iommu= [x86]
off
force
noforce
biomerge
panic
nopanic
merge
nomerge
forcesac
soft
pt [x86, IA64]
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