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  • Hi blackshard

    Tpc v 0.40a doesn't compile on my ArchLinux 64-bit.

    $ make
    Code:
    Makefile:43: *** mixed implicit and normal rules.  Stop.
    So I'm using a little workaround ;]

    Code:
    c++ -m64 *.cpp -o tpc
    And above compile tpc just fine.

    Comment


    • Originally posted by kfgz View Post
      Hi blackshard

      Tpc v 0.40a doesn't compile on my ArchLinux 64-bit.

      $ make
      Code:
      Makefile:43: *** mixed implicit and normal rules.  Stop.
      So I'm using a little workaround ;]

      Code:
      c++ -m64 *.cpp -o tpc
      And above compile tpc just fine.
      Thanks for the information, I'll check this fact.

      Still phoronix forum didn't notice me new posts about this thread

      Comment


      • Yet another new version for tpc. This is v0.41, still very experimental:

        - Polished and updated documentation with new options and behaviours.
        Now almost all the switches depends on nodes activated with -node
        switch and cores activated with -core switch. Check the documentation
        again because some commands have been changed.
        - Initial support for Brazos platform (i.e. Zacate and Ontario processors,
        Family 14h) and Llano platform (i.e. A-series and E2-series processors,
        Family 12h)
        - Corrected some DRAM reports for Family 10h processors.
        - Scaler has been reactived in a very experimental fashion. Has not been
        tested at all on processors with more than two cores.
        - Introduced a new interface for performance counters.
        - Changed cpu usage performance counter switch from -cpuusage to
        -perf-cpuusage. Introduced also -perf-fpuusage and -perf-dcma
        counters.

        Brazos and Llano support has not tested by myself, I have no hardware, but by some volounteers. They reported it basicly works. Since I don't know when I will be able to continue the project (lack of time, lack of hardware), I release now with partial support.



        or

        Comment


        • Hi blackshard,

          Thank you very much for this update.

          This tool seems fantastic and I thought the development was stopped.

          I have few questions:

          I have a Tyan s2915 with 2 Opteron 8389 (Quad Core Shanghai 2.9 GHz) on Ubuntu 10.04.

          I compiled successfully TPC and I am able to run it, everything seems to work, I read temperatures, P-states, etc.

          Code:
          sudo TurionPowerControl -l
          Turion Power States Optimization and Control - by blackshard - v0.41
          
          Main processor is Family 10h Processor
          	Family: 0xf		Model: 0x4		Stepping: 0x2
          	Extended Family: 0x10	Extended Model: 0x4
          	Package Type: 0x0	BrandId: 0x59f	
          Machine has 2 nodes
          Processor has 4 cores
          Processor has 5 p-states
          
          Power States table:
          -- Node: 0 Core 0
          core 0 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 0 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 0 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 0 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 0 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 0 Core 1
          core 1 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 1 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 1 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 1 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 1 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 0 Core 2
          core 2 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 2 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 2 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 2 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 2 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 0 Core 3
          core 3 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 3 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 3 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 3 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 3 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 1 Core 0
          core 0 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 0 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 0 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 0 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 0 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 1 Core 1
          core 1 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 1 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 1 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 1 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 1 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 1 Core 2
          core 2 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 2 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 2 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 2 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 2 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          -- Node: 1 Core 3
          core 3 pstate 0 - En:1 VID:22 FID:13 DID:0.00 Freq:2900 VCore:1.2750
          core 3 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
          core 3 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
          core 3 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
          core 3 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
          
           --- Node 0:
          Processor Maximum PState: 3
          Processor Startup PState: 3
          Processor Maximum Operating Frequency: 2900 MHz
          
          Minimum allowed VID: 93 (0.375v) - Maximum allowed VID 22 (1.275v)
          Processor AltVID: 34 (1.125v)
          
           --- Node 1:
          Processor Maximum PState: 3
          Processor Startup PState: 3
          Processor Maximum Operating Frequency: 2900 MHz
          
          Minimum allowed VID: 93 (0.375v) - Maximum allowed VID 22 (1.275v)
          Processor AltVID: 34 (1.125v)
          
          Done.
          The only things I cannot change are the frequencies and voltages.

          After I make a let's say : sudo TurionPowerControl -set core all pstate 0 frequency 2500
          How can I check the CPU frequency ?

          Because I don't really know how to monitor it. Most of the solutions only read the manufacturer speed.

          Do you think my problems only come from the fact that the Opteron shanghai is not supported even though it is Family 10h Processor ?


          Thank you for your answers.

          This tool is the only one I know that is actually working for some people, I don't understand why so few people seems to have an interest in it.


          Thank you again for your work !

          Comment


          • Your Opteron should be fully supported. It is a family 10h processor.
            Multiprocessor machines are also fully supported.

            I don't really understand what is the problem: you're not able to change frequency and voltage or you don't know if the frequency/voltage have been really changed?

            The former case has to be investigated. As I see from your log, there should be no problems setting custom frequencies or voltages.

            The latter case requires a benchmark tool to see if *effectively* the frequency has changed. You may run TurionPowerControl -l again to see if the processor registers are correctly written (you should see 2500 Mhz as the frequency of all cores of both your processors), if so you can run a benchmark.

            In the documentation I suggest to use prime95 and its benchmark feature, but any other benchmark will be equally useful. Of course you should not check cpuinfo or cpufreq tools because they don't update with realtime informations.

            Comment


            • Thank you very much for your fast answer.

              I actually think that is not working because I did some tests like that :

              Code:
              anvil@dual-opty:~$ sudo TurionPowerControl -set pstate 0 frequency 4000 vcore 0.500
              Turion Power States Optimization and Control - by blackshard - v0.41
              
              All nodes all cores pstate 0 - set frequency to 4000.000
              All nodes all cores pstate 0 - set core voltage to 0.500
              *** -set parsing completed
              
              Done.
              anvil@dual-opty:~$ sudo TurionPowerControl -l
              Turion Power States Optimization and Control - by blackshard - v0.41
              
              Main processor is Family 10h Processor
              	Family: 0xf		Model: 0x4		Stepping: 0x2
              	Extended Family: 0x10	Extended Model: 0x4
              	Package Type: 0x0	BrandId: 0x59f	
              Machine has 2 nodes
              Processor has 4 cores
              Processor has 5 p-states
              
              Power States table:
              -- Node: 0 Core 0
              core 0 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 0 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 0 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 0 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 0 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 0 Core 1
              core 1 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 1 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 1 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 1 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 1 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 0 Core 2
              core 2 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 2 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 2 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 2 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 2 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 0 Core 3
              core 3 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 3 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 3 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 3 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 3 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 1 Core 0
              core 0 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 0 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 0 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 0 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 0 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 1 Core 1
              core 1 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 1 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 1 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 1 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 1 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 1 Core 2
              core 2 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 2 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 2 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 2 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 2 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              -- Node: 1 Core 3
              core 3 pstate 0 - En:1 VID:84 FID:24 DID:0.00 Freq:4000 VCore:0.5000
              core 3 pstate 1 - En:1 VID:30 FID:7 DID:0.00 Freq:2300 VCore:1.1750
              core 3 pstate 2 - En:1 VID:32 FID:1 DID:0.00 Freq:1700 VCore:1.1500
              core 3 pstate 3 - En:1 VID:32 FID:0 DID:1.00 Freq:800 VCore:1.1500
              core 3 pstate 4 - En:0 VID:0 FID:0 DID:0.00 Freq:1600 VCore:1.5500
              
               --- Node 0:
              Processor Maximum PState: 3
              Processor Startup PState: 3
              Processor Maximum Operating Frequency: 2900 MHz
              
              Minimum allowed VID: 93 (0.375v) - Maximum allowed VID 22 (1.275v)
              Processor AltVID: 34 (1.125v)
              
               --- Node 1:
              Processor Maximum PState: 3
              Processor Startup PState: 3
              Processor Maximum Operating Frequency: 2900 MHz
              
              Minimum allowed VID: 93 (0.375v) - Maximum allowed VID 22 (1.275v)
              Processor AltVID: 34 (1.125v)
              
              Done.
              So processor registers should be correctly written right ?

              I am currently running some heavy multi-threaded computations and I do not see them speeding up or crashing, so I assume that the speed and voltages have not been changed.

              I am writing on the right P-state, correct?

              Thanks

              Comment


              • Ok, the program is correctly writing the registers. The modifications become active when there's a transition to the pstate you have modified, so if you disabled C&Q or have a fixed frequency, your cpu won't re-enter in your modified pstate and modifications don't become active.

                You may run such a command:

                > TurionPowerControl -set core all pstate 0 frequency 2500 -fo 0

                and that should work.

                Simply -fo 0 tells the program to force all cores of all processors to re-enter in pstate 0 to let the new register values become active.
                Last edited by blackshard; 26 September 2011, 08:48 AM.

                Comment


                • Thank you for your repply,


                  I will give it a try this evening.

                  Thanks !

                  Comment


                  • I've been using k10ctl for *years*. It "just works". Not sure what's supposed to be so great about TPC.

                    Comment


                    • I didn't know k10 was available for Linux, I will give it a try.

                      TPC has the advantage to exist, such software is so rare on Linux.

                      And the developer is also helping a lot the users, this was good to precise

                      Comment

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