Page 5 of 5 FirstFirst ... 345
Results 41 to 47 of 47

Thread: ARM Talks Up Wayland For Mali

  1. #41
    Join Date
    Jan 2009
    Posts
    1,480

    Default

    Quote Originally Posted by robclark View Post
    I happen to know a bit about it ;-)

    Haven't really dug into the new features yet (full DX11 pipeline).. it does seem to have a few tweaks in the shader core to improve IPC, bit of cmdstream related fine tuning here and there, looks like it has framebuffer compression (increasingly important as resolutions go up), increased limits here and there (more vbo's and attributes, etc), and ofc the new pipeline stages. Should be a nice incremental improvement. The really big thing I'm looking forward to is the memory bandwidth on snapdragon 805 (apq8084)... omg!

    Fortunately for a4xx, I can share the compiler with a3xx. Unfortunately basically all the registers change and/or move. I've done most of the initial r/e already (ie. enough to draw some triangles... but there will be more to do still). Still need to write a bunch of gallium code for the new gpu.
    I knew you would
    AT had an interesting deep dive into the new Mali arch (called Asgard, iirc), and it too featured (lossless)fbc, along with a few interesting design choices.
    The bandwidth, as you say, is crazy. Iirc, it's the same as current Intel (~25GB). Not sure how the cores can make use of that much bandwidth right now, but this might be intended more for upcoming cores.
    I wonder if the cmdstrm changes were mostly to accommodate opencl device partitions?
    Glad to hear you can share the compiler, though that does mean this wasn't the massive arch update that 2xx->3xx was.

  2. #42
    Join Date
    Sep 2011
    Posts
    292

    Default

    Quote Originally Posted by liam View Post
    I knew you would
    AT had an interesting deep dive into the new Mali arch (called Asgard, iirc), and it too featured (lossless)fbc, along with a few interesting design choices.
    The bandwidth, as you say, is crazy. Iirc, it's the same as current Intel (~25GB). Not sure how the cores can make use of that much bandwidth right now, but this might be intended more for upcoming cores.
    I wonder if the cmdstrm changes were mostly to accommodate opencl device partitions?
    Glad to hear you can share the compiler, though that does mean this wasn't the massive arch update that 2xx->3xx was.
    fwiw, it seems like the higher end a4xx series will support some form of fbc, although I've not seen how to use it yet (probably just not supported yet in current drivers?)... actually I pretty much assume all the high end SoC's will eventually have fbc (considering the resolution trajectory).

    I think most of the register reshuffling is related to new features (pipeline stages, increased # of varyings, etc).. there simply wasn't room to fit new registers in the existing gaps. Few changes seem to be related to tightening up the cmdstream (ie. put registers that are frequently written together next to each other, etc).

    Definitely a smaller change than 2xx->3xx.. 4xx is a bit more complex, in the sense of more registers to set. But really the hugest part (and the part where there is most work remaining on a3xx) is compiler. So there was a huge sigh of relief once I was able to confirm that was basically the same from 3xx->4xx.

    Now I just need to find some time to write some code and bang out some triangles :-P

  3. #43
    Join Date
    Jan 2009
    Posts
    1,480

    Default

    Quote Originally Posted by robclark View Post
    I think most of the register reshuffling is related to new features (pipeline stages, increased # of varyings, etc).. there simply wasn't room to fit new registers in the existing gaps. Few changes seem to be related to tightening up the cmdstream (ie. put registers that are frequently written together next to each other, etc).

    Definitely a smaller change than 2xx->3xx.. 4xx is a bit more complex, in the sense of more registers to set. But really the hugest part (and the part where there is most work remaining on a3xx) is compiler. So there was a huge sigh of relief once I was able to confirm that was basically the same from 3xx->4xx.

    Now I just need to find some time to write some code and bang out some triangles :-P
    More varyings? Really does look like this arch is all about handling higher resolutions.
    I was looking at your adreno-common file and the section regarding commonality between 3xx&4xx seems awfully short. Is that indicating the hardware mapping isn't close to completion or am I missing something?
    Sorry if that's a dumb question but I hadn't looked in that file before.

  4. #44
    Join Date
    Sep 2011
    Posts
    292

    Default

    Quote Originally Posted by liam View Post
    More varyings? Really does look like this arch is all about handling higher resolutions.
    I was looking at your adreno-common file and the section regarding commonality between 3xx&4xx seems awfully short. Is that indicating the hardware mapping isn't close to completion or am I missing something?
    Sorry if that's a dumb question but I hadn't looked in that file before.
    fwiw, adreno_common.xml is really stuff that is in common between a2xx and a3xx. It used to be that most of the registers the kernel had to deal with were same between a2xx and a3xx. Now a4xx moves even those around, so I didn't bother trying to have a separate file with stuff in common (because there basically was none). Have a look at a4xx.xml

  5. #45
    Join Date
    Jan 2009
    Posts
    1,480

    Default

    Quote Originally Posted by robclark View Post
    fwiw, adreno_common.xml is really stuff that is in common between a2xx and a3xx. It used to be that most of the registers the kernel had to deal with were same between a2xx and a3xx. Now a4xx moves even those around, so I didn't bother trying to have a separate file with stuff in common (because there basically was none). Have a look at a4xx.xml

    Ah. That makes sense. Thanks for the tip.

  6. #46
    Join Date
    May 2014
    Posts
    74

    Default

    Quote Originally Posted by WorBlux View Post
    http://elinux.org/File:A10_eoma_pcmcia_laptop.png

    http://aseigo.blogspot.com/2013/11/i...ng-improv.html

    So you have the CPU module, so just design the motherboard, select the battery and display, and create a 3-D model of the case suitable for 3-D printers or cnc processes.
    Improv? I thought that board was stillborn?

  7. #47
    Join Date
    Jan 2011
    Posts
    209

    Default

    Quote Originally Posted by CrystalGamma View Post
    Improv? I thought that board was stillborn?
    Seems like it, guess I'm behind the times.

    Might be able to revive it if anyone can round up a few thousand orders.

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •