RadeonSI Now Supports Tessellation In Mesa Git

[valeriodean]

About 4.1 and 4.2 compliance, I saw already patches posted in ML for both GL_ARB_shader_precision [4.1] and GL_ARB_shader_image_load_store [4.2]. So, I guess we'll have 4.2 compliance in time for the release of september.

[dungeon]

Isn't GL_ARB_shader_precision left before 4.1?

No, it just is not and can't be enabled on earlier context of course, once there is GLSL 410 advertised you get that extension too:

http://permalink.gmane.org/gmane.com...d.devel/108075

[Nille_kungen]

Thanks for the follow up so it looks like mesa core will be OpenGL 4.2?
Mesa and driver devs does a great job and it makes me happy to see the progress.
It's a lot of work behind these extentions.

[Khudsa]

That's great! Thank you, thank you very much, mesa devs!!!

Now to wait for my card, an r600 one, to be supported

[Ancurio]

About 4.1 and 4.2 compliance, I saw already patches posted in ML for both GL_ARB_shader_precision [4.1] and GL_ARB_shader_image_load_store [4.2]. So, I guess we'll have 4.2 compliance in time for the release of september.

Actually for image load store, hasn't the core mesa structure been in git for a long time? It's just about binding images to slots similar to textures, so not a whole lot of complexity.. Anyway, most of that work on the mailing list is for the intel implementation. radeonsi/noveau might still take a while longer.

Edit: Also none of the gallium drivers have atomic counters yet. But those three (counters/images/ssbos) all look to be roughly in a similar problem domain, so work on one could speed up the others.

[Ancurio]

Yes and no. The core implementation is not the end of it. i965 still needs fp64 and tess to be implemented (work on both of these has been started, but I don't think are in active development), radeonsi needs gs5 (which is being worked on and very close). Just pushed the nvc0 tess stuff, so that should now be actually reporting GL 4.1.

Illia, did you manage to determine what was causing the blue triangles in your tessellation impl?

[imirkin]

Illia, did you manage to determine what was causing the blue triangles in your tessellation impl?

Yeah. RA failed to take into account that a multi-word load would overwrite the indirect address argument before it was done loading. It actually took the first dim into account, but not the second dim. Oops. http://cgit.freedesktop.org/mesa/mes...50709fc317498e was the fix... no more blue splotches on my fermi at least.

[boffo]

Congratulations, you guys are amazing!

[Azpegath]

We are finally there! Wohoo!

[newwen]

So, what are the plans (if any) for fp64 implementation in Intel/r600 drivers? I thought the hardware didn't support that functionality on those.