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AMD Releases Microcode For All GPUs

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  • #16
    Originally posted by bridgman View Post
    frago, R600 3D is next on the list but there is still a fair amount of work to be done on the document.
    I see there is many work to do, but i am glad that documentation/implementation is going on. In deed we has to spent respect these Developers which have still a lot to do now!

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    • #17
      Originally posted by sid350 View Post
      so what about RC410?
      01:05.0 VGA compatible controller: ATI Technologies Inc RC410 [Radeon Xpress 200M]
      Afaik this chip is very special and makes developers strange headage. (sorry i don't know where i read this)

      generic informations are here:
      http://dri.freedesktop.org/wiki/ATIRadeon

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      • #18
        The RC410 3D engine is covered by the R3xx 3D register spec we released (last week ?), and most of the remaining hardware was covered by the original R200-era documentation. There are still a few gaps in the documentation but they're getting smaller.

        The integrated parts were a pain for the developers because they didn't have programmable vertex shaders and so the 3D engine needed to be set up differently. Without docs that was *really* difficult -- with docs it's just difficult

        The RS780 (aka 780G) graphics core seems to have all of its shaders intact, so there should be some happy 3D developers once they get around to working on the 780.

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        • #19
          Originally posted by bridgman View Post
          RV670 microcode was included in today's release, along with RV620 and RV635. For the register specs, tried to pick one chip which was representative of the entire family, since the registers are pretty much the same across all the variants. We went with the docs for mobile parts (mobile uses more features of the chip). Going with a mobile part means choosing a low end or midrange GPU, but it doesn't matter since the registers are the same anyways.

          There are a couple of exceptions, like the RV515 memory controller registers having a different offset than the rest of the R5xx family. The latest parts (rv620/635) are also significantly different so we have one of those docs in the queue for cleanup and public release (the radeonhd devs have the info under NDA already).
          That makes sense and hey thanks for the info and a fast response.

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          • #20
            I'm really excited about this
            I bought a HD3650 DDR2, the hardware is more than just great for the price, now it seems the support will follows. I can't wait for the day where I can say "Yeah, AMD is much more bang for buck AND has more support"
            Things sure seem to be heading that way and fast with everyone working on their own driver claiming their method is better for whatever reason. The only clear winner here is the consumer. =]

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            • #21
              *Wow*. Fair play to AMD/ATI for all of this. The rate at which they're pushing out specs is amazing, and they've certainly shattered a few negative opinions of them in the last while.

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              • #22
                Following the progress at http://gitweb.freedesktop.org/?p=xor....git;a=summary

                just want to say, go go go :-)

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                • #23
                  what the fuck?

                  Microcode isn't source code AMD. Not acceptable.

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                  • #24
                    My understanding is that microcode blobs are accepted, although there is some discussion about having the microcode blobs loaded from user space to avoid the kernel getting too big. I don't think anyone is publishing microcode source today.

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                    • #25
                      Originally posted by bugmenot View Post
                      Microcode isn't source code AMD. Not acceptable.
                      Source Code???????
                      They are releasing their specs + microcode, not opening their driver source code!
                      BTW, do you know what exactly are ucode and specifications???

                      PS: Great work/news from AMD/ATI despite their delicate situation, hopefully they'll get up and kick ass!!

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                      • #26
                        Originally posted by bugmenot View Post
                        Microcode isn't source code AMD. Not acceptable.
                        Microcode source would probably be useless without a whole new layer of tools and documentation (I only say "probably" on the outside chance that it's using some standard ISA, which has been done in the past for at least one other vendor's "microcode"). It might be interesting to look at, but in a practical sense it's more part of the hardware than part of the driver. It doesn't run on the host CPU, and the hardware doesn't behave as documented without it. Besides, the role of the Radeon CP microcode seems to be pretty limited in scope unless I'm grossly misunderstanding something. Even FSF/GNU is not actively calling for this kind of stuff to be released, as far as I know...

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                        • #27
                          Originally posted by Ex-Cyber View Post
                          Microcode source would probably be useless without a whole new layer of tools and documentation (I only say "probably" on the outside chance that it's using some standard ISA, which has been done in the past for at least one other vendor's "microcode"). It might be interesting to look at, but in a practical sense it's more part of the hardware than part of the driver. It doesn't run on the host CPU, and the hardware doesn't behave as documented without it. Besides, the role of the Radeon CP microcode seems to be pretty limited in scope unless I'm grossly misunderstanding something. Even FSF/GNU is not actively calling for this kind of stuff to be released, as far as I know...
                          The microcode is a little program that runs on the command processor and tells it how to parse up the incoming command packets. These packets are used to program the acceleration engines. The CP decodes the incoming packets and then programs the accel registers to do the appropriate thing. The microcode is nothing more than a packet parser. For the most part you can program the the accel registers directly via MMIO, but it's much less efficient.

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                          • #28
                            Originally posted by agd5f View Post
                            The microcode is nothing more than a packet parser. For the most part you can program the the accel registers directly via MMIO, but it's much less efficient.
                            Ah. I was wondering about this. When I read the microcode blob was released, I was a bit confused. All this time the xorg-video-ati driver has worked without this microcode (I presume, because redistribution wouldn't have been allowed), so I was wondering what the need for it was. Speed, you say!

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                            • #29
                              The microcode is loaded by mesa/drm, and was stored there. The -ati driver uses the Command Processor (which runs the microcode) if DRM is there, and uses the slower MMIO paths if DRM is not there.

                              I'm not 100% sure, but I think DRM previously contained microcode for R100/R200 which had been released by ATI and R300 microcode which had been "reverse engineered" from the fglrx driver. The R300 microcode was being used for 4xx and 5xx as well, which worked OK but probably introduced a few bugs which the new microcode should fix.

                              As Alex said, the microcode determines how the command packets ("PM4 packets", described in the R5xx 3D Acceleration document) are parsed, ie the microcode allows the chip to behave the way we documented it.
                              Last edited by bridgman; 03-22-2008, 02:22 PM.

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                              • #30
                                Is there any info about what important new microcode fixes for each rXXX ?

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