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R600 Gallium3D LLVM Shader Compiler Hooked Up

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  • #31
    Originally posted by Pontostroy View Post
    I use trank LLVM-3.2_svn20120421

    Lightmark warning message:
    warning: failed to translate tgsi opcode F2I to LLVM
    warning: failed to translate tgsi opcode F2I to LLVM
    et:qw
    pure virtual method called
    terminate called recursively
    terminate called recursively
    pure virtual method called
    terminate called recursively
    pure virtual method called
    Segmentation fault
    F2I is the TGSI opcode for converting floats to integers, and it seems that the plumbing to convert floats to ints is missing in the TGSI->LLVM code.

    I've managed to get an INCORRECT workaround in place by editing:
    ${mesa_root}/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

    Around, line 570, add the following:
    bld_base->op_actions[TGSI_OPCODE_F2I].emit = lp_build_tgsi_intrinsic;
    bld_base->op_actions[TGSI_OPCODE_F2I].intr_name = "llvm.AMDIL.f32.i32.flr.";

    As I said, this is an incorrect solution. This uses the floor rounding method combined with the float -> int conversion, whereas GLSL should truncate/round-to-zero. There is an FTOI instruction defined in the AMD IL, but I haven't figured out what is needed to output an instruction instead of an intrinsic, and more importantly, where the rest of the conversions are stored. Unfortunately, I won't be able to continue looking at this until after work today.

    Even though the solution is incorrect, it increases my piglit test passes from 5700 to ~7400 (of 8000+ total).

    Comment


    • #32
      Originally posted by ChrisXY View Post
      So I checked llvm out from http://llvm.org/svn/llvm-project/llv...ELEASE_31/rc1/ and compiled mesa with it.

      <snip>

      struntrally cannot start a map:
      Code:
      LLVM ERROR: Cannot select: target intrinsic %llvm.AMDGPU.kill
      <snip>
      How new was the mesa you compiled? This committ looks like it might fix this issue:

      http://cgit.freedesktop.org/mesa/mes...9750e194759d89

      Comment


      • #33
        Originally posted by madbiologist View Post
        How new was the mesa you compiled? This committ looks like it might fix this issue:

        http://cgit.freedesktop.org/mesa/mes...9750e194759d89
        Very new. To be sure I pulled and recompiled it again and it still fails. "R600_LLVM=0 stuntrally" works.

        Comment


        • #34
          Originally posted by Veerappan View Post
          F2I is the TGSI opcode for converting floats to integers, and it seems that the plumbing to convert floats to ints is missing in the TGSI->LLVM code.

          I've managed to get an INCORRECT workaround in place by editing:
          ${mesa_root}/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

          Around, line 570, add the following:
          bld_base->op_actions[TGSI_OPCODE_F2I].emit = lp_build_tgsi_intrinsic;
          bld_base->op_actions[TGSI_OPCODE_F2I].intr_name = "llvm.AMDIL.f32.i32.flr.";

          As I said, this is an incorrect solution. This uses the floor rounding method combined with the float -> int conversion, whereas GLSL should truncate/round-to-zero. There is an FTOI instruction defined in the AMD IL, but I haven't figured out what is needed to output an instruction instead of an intrinsic, and more importantly, where the rest of the conversions are stored. Unfortunately, I won't be able to continue looking at this until after work today.

          Even though the solution is incorrect, it increases my piglit test passes from 5700 to ~7400 (of 8000+ total).
          in Unigine heaven and lightmark i got:
          Code:
          Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
          Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
          Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
          LLVM ERROR: Not supported instr: CALL <ga:@llvm.AMDIL.f32.i32.flr.>, %R1<imp-use>, %R2<imp-use,kill>, %R3<imp-use,kill>, %R4<imp-use,kill>, %R5<imp-use,kill>, %R6<imp-use,kill>, %R7<imp-use,kill>, %R8<imp-use,kill>, %R9<imp-use,kill>, %R10<imp-use,kill>, %R11<imp-use,kill>, %R12<imp-use,kill>, %R13<imp-use,kill>, %R14<imp-use,kill>, %R15<imp-use,kill>, %R16<imp-use,kill>, %R17<imp-use,kill>, %R18<imp-use,kill>, %R19<imp-use,kill>, %R20<imp-use,kill>, %R21<imp-use,kill>, %R22<imp-use,kill>, %R23<imp-use,kill>, %R24<imp-use,kill>, %R25<imp-use,kill>, %R26<imp-use,kill>, %R27<imp-use,kill>, %R28<imp-use,kill>, %R29<imp-use,kill>, %R30<imp-use,kill>, %R31<imp-use,kill>, %R32<imp-use,kill>, %R33<imp-use,kill>, %R34<imp-use,kill>, %R35<imp-use,kill>, %R36<imp-use,kill>, %R37<imp-use,kill>, %R38<imp-use,kill>, %R39<imp-use,kill>, %R40<imp-use,kill>, %R41<imp-use,kill>, %R42<imp-use,kill>, %R43<imp-use,kill>, %R44<imp-use,kill>, %R45<imp-use,kill>, %R46<imp-use,kill>, %R47<imp-use,kill>, %R48<imp-use,kill>, %R49<imp-use,kill>, %R50<imp-use,kill>, %R51<imp-use,kill>, %R52<imp-use,kill>, %R53<imp-use,kill>, %R54<imp-use,kill>, %R55<imp-use,kill>, %R56<imp-use,kill>, %R57<imp-use,kill>, %R58<imp-use,kill>, %R59<imp-use,kill>, %R60<imp-use,kill>, %R61<imp-use,kill>, %R62<imp-use,kill>, %R63<imp-use,kill>, %R64<imp-use,kill>, %R65<imp-use,kill>, %R66<imp-use,kill>, %R67<imp-use,kill>, %R68<imp-use,kill>, %R69<imp-use,kill>, %R70<imp-use,kill>, %R71<imp-use,kill>, %R72<imp-use,kill>, %R73<imp-use,kill>, %R74<imp-use,kill>, %R75<imp-use,kill>, %R76<imp-use,kill>, %R77<imp-use,kill>, %R78<imp-use,kill>, %R79<imp-use,kill>, %R80<imp-use,kill>, %R81<imp-use,kill>, %R82<imp-use,kill>, %R83<imp-use,kill>, %R84<imp-use,kill>, %R85<imp-use,kill>, %R86<imp-use,kill>, %R87<imp-use,kill>, %R88<imp-use,kill>, %R89<imp-use,kill>, %R90<imp-use,kill>, %R91<imp-use,kill>, %R92<imp-use,kill>, %R93<imp-use,kill>, %R94<imp-use,kill>, %R95<imp-use,kill>, %R96<imp-use,kill>, %R97<imp-use,kill>, %R98<imp-use,kill>, %R99<imp-use,kill>, %R100<imp-use,kill>, %R101<imp-use,kill>, %R102<imp-use,kill>, %R103<imp-use,kill>, %R104<imp-use,kill>, %R105<imp-use,kill>, %R106<imp-use,kill>, %R107<imp-use,kill>, %R108<imp-use,kill>, %R109<imp-use,kill>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %R4<imp-use>, %R5<imp-use>, %R6<imp-use>, %R7<imp-use>, %R8<imp-use>, %R9<imp-use>, %R10<imp-use>, %R11<imp-use>, %R12<imp-use>, %R13<imp-use>, %R14<imp-use>, %R15<imp-use>, %R16<imp-use>, %R17<imp-use>, %R18<imp-use>, %R19<imp-use>, %R20<imp-use>, %R21<imp-use>, %R22<imp-use>, %R23<imp-use>, %R24<imp-use>, %R25<imp-use>, %R26<imp-use>, %R27<imp-use>, %R28<imp-use>, %R29<imp-use>, %R30<imp-use>, %R31<imp-use>, %R32<imp-use>, %R33<imp-use>, %R34<imp-use>, %R35<imp-use>, %R36<imp-use>, %R37<imp-use>, %R38<imp-use>, %R39<imp-use>, %R40<imp-use>, %R41<imp-use>, %R42<imp-use>, %R43<imp-use>, %R44<imp-use>, %R45<imp-use>, %R46<imp-use>, %R47<imp-use>, %R48<imp-use>, %R49<imp-use>, %R50<imp-use>, %R51<imp-use>, %R52<imp-use>, %R53<imp-use>, %R54<imp-use>, %R55<imp-use>, %R56<imp-use>, %R57<imp-use>, %R58<imp-use>, %R59<imp-use>, %R60<imp-use>, %R61<imp-use>, %R62<imp-use>, %R63<imp-use>, %R64<imp-use>, %R65<imp-use>, %R66<imp-use>, %R67<imp-use>, %R68<imp-use>, %R69<imp-use>, %R70<imp-use>, %R71<imp-use>, %R72<imp-use>, %R73<imp-use>, %R74<imp-use>, %R75<imp-use>, %R76<imp-use>, %R77<imp-use>, %R78<imp-use>, %R79<imp-use>, %R80<imp-use>, %R81<imp-use>, %R82<imp-use>, %R83<imp-use>, %R84<imp-use>, %R85<imp-use>, %R86<imp-use>, %R87<imp-use>, %R88<imp-use>, %R89<imp-use>, %R90<imp-use>, %R91<imp-use>, %R92<imp-use>, %R93<imp-use>, %R94<imp-use>, %R95<imp-use>, %R96<imp-use>, %R97<imp-use>, %R98<imp-use>, %R99<imp-use>, %R100<imp-use>, %R101<imp-use>, %R102<imp-use>, %R103<imp-use>, %R104<imp-use>, %R105<imp-use>, %R106<imp-use>, %R107<imp-use>, %R108<imp-use>, %R109<imp-use>, ...

          Comment


          • #35
            Originally posted by Pontostroy View Post
            in Unigine heaven and lightmark i got:
            Code:
            Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
            Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
            Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
            LLVM ERROR: Not supported instr: CALL <ga:@llvm.AMDIL.f32.i32.flr.>, %R1<imp-use>, %R2<imp-use,kill>, %R3<imp-use,kill>, %R4<imp-use,kill>, %R5<imp-use,kill>, %R6<imp-use,kill>, %R7<imp-use,kill>, %R8<imp-use,kill>, %R9<imp-use,kill>, %R10<imp-use,kill>, %R11<imp-use,kill>, %R12<imp-use,kill>, %R13<imp-use,kill>, %R14<imp-use,kill>, %R15<imp-use,kill>, %R16<imp-use,kill>, %R17<imp-use,kill>, %R18<imp-use,kill>, %R19<imp-use,kill>, %R20<imp-use,kill>, %R21<imp-use,kill>, %R22<imp-use,kill>, %R23<imp-use,kill>, %R24<imp-use,kill>, %R25<imp-use,kill>, %R26<imp-use,kill>, %R27<imp-use,kill>, %R28<imp-use,kill>, %R29<imp-use,kill>, %R30<imp-use,kill>, %R31<imp-use,kill>, %R32<imp-use,kill>, %R33<imp-use,kill>, %R34<imp-use,kill>, %R35<imp-use,kill>, %R36<imp-use,kill>, %R37<imp-use,kill>, %R38<imp-use,kill>, %R39<imp-use,kill>, %R40<imp-use,kill>, %R41<imp-use,kill>, %R42<imp-use,kill>, %R43<imp-use,kill>, %R44<imp-use,kill>, %R45<imp-use,kill>, %R46<imp-use,kill>, %R47<imp-use,kill>, %R48<imp-use,kill>, %R49<imp-use,kill>, %R50<imp-use,kill>, %R51<imp-use,kill>, %R52<imp-use,kill>, %R53<imp-use,kill>, %R54<imp-use,kill>, %R55<imp-use,kill>, %R56<imp-use,kill>, %R57<imp-use,kill>, %R58<imp-use,kill>, %R59<imp-use,kill>, %R60<imp-use,kill>, %R61<imp-use,kill>, %R62<imp-use,kill>, %R63<imp-use,kill>, %R64<imp-use,kill>, %R65<imp-use,kill>, %R66<imp-use,kill>, %R67<imp-use,kill>, %R68<imp-use,kill>, %R69<imp-use,kill>, %R70<imp-use,kill>, %R71<imp-use,kill>, %R72<imp-use,kill>, %R73<imp-use,kill>, %R74<imp-use,kill>, %R75<imp-use,kill>, %R76<imp-use,kill>, %R77<imp-use,kill>, %R78<imp-use,kill>, %R79<imp-use,kill>, %R80<imp-use,kill>, %R81<imp-use,kill>, %R82<imp-use,kill>, %R83<imp-use,kill>, %R84<imp-use,kill>, %R85<imp-use,kill>, %R86<imp-use,kill>, %R87<imp-use,kill>, %R88<imp-use,kill>, %R89<imp-use,kill>, %R90<imp-use,kill>, %R91<imp-use,kill>, %R92<imp-use,kill>, %R93<imp-use,kill>, %R94<imp-use,kill>, %R95<imp-use,kill>, %R96<imp-use,kill>, %R97<imp-use,kill>, %R98<imp-use,kill>, %R99<imp-use,kill>, %R100<imp-use,kill>, %R101<imp-use,kill>, %R102<imp-use,kill>, %R103<imp-use,kill>, %R104<imp-use,kill>, %R105<imp-use,kill>, %R106<imp-use,kill>, %R107<imp-use,kill>, %R108<imp-use,kill>, %R109<imp-use,kill>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %R4<imp-use>, %R5<imp-use>, %R6<imp-use>, %R7<imp-use>, %R8<imp-use>, %R9<imp-use>, %R10<imp-use>, %R11<imp-use>, %R12<imp-use>, %R13<imp-use>, %R14<imp-use>, %R15<imp-use>, %R16<imp-use>, %R17<imp-use>, %R18<imp-use>, %R19<imp-use>, %R20<imp-use>, %R21<imp-use>, %R22<imp-use>, %R23<imp-use>, %R24<imp-use>, %R25<imp-use>, %R26<imp-use>, %R27<imp-use>, %R28<imp-use>, %R29<imp-use>, %R30<imp-use>, %R31<imp-use>, %R32<imp-use>, %R33<imp-use>, %R34<imp-use>, %R35<imp-use>, %R36<imp-use>, %R37<imp-use>, %R38<imp-use>, %R39<imp-use>, %R40<imp-use>, %R41<imp-use>, %R42<imp-use>, %R43<imp-use>, %R44<imp-use>, %R45<imp-use>, %R46<imp-use>, %R47<imp-use>, %R48<imp-use>, %R49<imp-use>, %R50<imp-use>, %R51<imp-use>, %R52<imp-use>, %R53<imp-use>, %R54<imp-use>, %R55<imp-use>, %R56<imp-use>, %R57<imp-use>, %R58<imp-use>, %R59<imp-use>, %R60<imp-use>, %R61<imp-use>, %R62<imp-use>, %R63<imp-use>, %R64<imp-use>, %R65<imp-use>, %R66<imp-use>, %R67<imp-use>, %R68<imp-use>, %R69<imp-use>, %R70<imp-use>, %R71<imp-use>, %R72<imp-use>, %R73<imp-use>, %R74<imp-use>, %R75<imp-use>, %R76<imp-use>, %R77<imp-use>, %R78<imp-use>, %R79<imp-use>, %R80<imp-use>, %R81<imp-use>, %R82<imp-use>, %R83<imp-use>, %R84<imp-use>, %R85<imp-use>, %R86<imp-use>, %R87<imp-use>, %R88<imp-use>, %R89<imp-use>, %R90<imp-use>, %R91<imp-use>, %R92<imp-use>, %R93<imp-use>, %R94<imp-use>, %R95<imp-use>, %R96<imp-use>, %R97<imp-use>, %R98<imp-use>, %R99<imp-use>, %R100<imp-use>, %R101<imp-use>, %R102<imp-use>, %R103<imp-use>, %R104<imp-use>, %R105<imp-use>, %R106<imp-use>, %R107<imp-use>, %R108<imp-use>, %R109<imp-use>, ...
            I'll double-check what I posted when I get home. I was writing that from memory this morning. Hopefully I'll figure out the proper fix tonight and try to get it pushed to Tom/Mesa.

            Comment


            • #36
              Originally posted by Pontostroy View Post
              in Unigine heaven and lightmark i got:
              Code:
              Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
              Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
              Warning: R600 LLVM backend does not support indirect adressing.  Falling back to TGSI backend.                                                                                                                    
              LLVM ERROR: Not supported instr: CALL <ga:@llvm.AMDIL.f32.i32.flr.>, %R1<imp-use>, %R2<imp-use,kill>, %R3<imp-use,kill>, %R4<imp-use,kill>, %R5<imp-use,kill>, %R6<imp-use,kill>, %R7<imp-use,kill>, %R8<imp-use,kill>, %R9<imp-use,kill>, %R10<imp-use,kill>, %R11<imp-use,kill>, %R12<imp-use,kill>, %R13<imp-use,kill>, %R14<imp-use,kill>, %R15<imp-use,kill>, %R16<imp-use,kill>, %R17<imp-use,kill>, %R18<imp-use,kill>, %R19<imp-use,kill>, %R20<imp-use,kill>, %R21<imp-use,kill>, %R22<imp-use,kill>, %R23<imp-use,kill>, %R24<imp-use,kill>, %R25<imp-use,kill>, %R26<imp-use,kill>, %R27<imp-use,kill>, %R28<imp-use,kill>, %R29<imp-use,kill>, %R30<imp-use,kill>, %R31<imp-use,kill>, %R32<imp-use,kill>, %R33<imp-use,kill>, %R34<imp-use,kill>, %R35<imp-use,kill>, %R36<imp-use,kill>, %R37<imp-use,kill>, %R38<imp-use,kill>, %R39<imp-use,kill>, %R40<imp-use,kill>, %R41<imp-use,kill>, %R42<imp-use,kill>, %R43<imp-use,kill>, %R44<imp-use,kill>, %R45<imp-use,kill>, %R46<imp-use,kill>, %R47<imp-use,kill>, %R48<imp-use,kill>, %R49<imp-use,kill>, %R50<imp-use,kill>, %R51<imp-use,kill>, %R52<imp-use,kill>, %R53<imp-use,kill>, %R54<imp-use,kill>, %R55<imp-use,kill>, %R56<imp-use,kill>, %R57<imp-use,kill>, %R58<imp-use,kill>, %R59<imp-use,kill>, %R60<imp-use,kill>, %R61<imp-use,kill>, %R62<imp-use,kill>, %R63<imp-use,kill>, %R64<imp-use,kill>, %R65<imp-use,kill>, %R66<imp-use,kill>, %R67<imp-use,kill>, %R68<imp-use,kill>, %R69<imp-use,kill>, %R70<imp-use,kill>, %R71<imp-use,kill>, %R72<imp-use,kill>, %R73<imp-use,kill>, %R74<imp-use,kill>, %R75<imp-use,kill>, %R76<imp-use,kill>, %R77<imp-use,kill>, %R78<imp-use,kill>, %R79<imp-use,kill>, %R80<imp-use,kill>, %R81<imp-use,kill>, %R82<imp-use,kill>, %R83<imp-use,kill>, %R84<imp-use,kill>, %R85<imp-use,kill>, %R86<imp-use,kill>, %R87<imp-use,kill>, %R88<imp-use,kill>, %R89<imp-use,kill>, %R90<imp-use,kill>, %R91<imp-use,kill>, %R92<imp-use,kill>, %R93<imp-use,kill>, %R94<imp-use,kill>, %R95<imp-use,kill>, %R96<imp-use,kill>, %R97<imp-use,kill>, %R98<imp-use,kill>, %R99<imp-use,kill>, %R100<imp-use,kill>, %R101<imp-use,kill>, %R102<imp-use,kill>, %R103<imp-use,kill>, %R104<imp-use,kill>, %R105<imp-use,kill>, %R106<imp-use,kill>, %R107<imp-use,kill>, %R108<imp-use,kill>, %R109<imp-use,kill>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %R4<imp-use>, %R5<imp-use>, %R6<imp-use>, %R7<imp-use>, %R8<imp-use>, %R9<imp-use>, %R10<imp-use>, %R11<imp-use>, %R12<imp-use>, %R13<imp-use>, %R14<imp-use>, %R15<imp-use>, %R16<imp-use>, %R17<imp-use>, %R18<imp-use>, %R19<imp-use>, %R20<imp-use>, %R21<imp-use>, %R22<imp-use>, %R23<imp-use>, %R24<imp-use>, %R25<imp-use>, %R26<imp-use>, %R27<imp-use>, %R28<imp-use>, %R29<imp-use>, %R30<imp-use>, %R31<imp-use>, %R32<imp-use>, %R33<imp-use>, %R34<imp-use>, %R35<imp-use>, %R36<imp-use>, %R37<imp-use>, %R38<imp-use>, %R39<imp-use>, %R40<imp-use>, %R41<imp-use>, %R42<imp-use>, %R43<imp-use>, %R44<imp-use>, %R45<imp-use>, %R46<imp-use>, %R47<imp-use>, %R48<imp-use>, %R49<imp-use>, %R50<imp-use>, %R51<imp-use>, %R52<imp-use>, %R53<imp-use>, %R54<imp-use>, %R55<imp-use>, %R56<imp-use>, %R57<imp-use>, %R58<imp-use>, %R59<imp-use>, %R60<imp-use>, %R61<imp-use>, %R62<imp-use>, %R63<imp-use>, %R64<imp-use>, %R65<imp-use>, %R66<imp-use>, %R67<imp-use>, %R68<imp-use>, %R69<imp-use>, %R70<imp-use>, %R71<imp-use>, %R72<imp-use>, %R73<imp-use>, %R74<imp-use>, %R75<imp-use>, %R76<imp-use>, %R77<imp-use>, %R78<imp-use>, %R79<imp-use>, %R80<imp-use>, %R81<imp-use>, %R82<imp-use>, %R83<imp-use>, %R84<imp-use>, %R85<imp-use>, %R86<imp-use>, %R87<imp-use>, %R88<imp-use>, %R89<imp-use>, %R90<imp-use>, %R91<imp-use>, %R92<imp-use>, %R93<imp-use>, %R94<imp-use>, %R95<imp-use>, %R96<imp-use>, %R97<imp-use>, %R98<imp-use>, %R99<imp-use>, %R100<imp-use>, %R101<imp-use>, %R102<imp-use>, %R103<imp-use>, %R104<imp-use>, %R105<imp-use>, %R106<imp-use>, %R107<imp-use>, %R108<imp-use>, %R109<imp-use>, ...
              I forgot to include the .convert part of the intrinsic name:

              bld_base->op_actions[TGSI_OPCODE_F2I].emit = lp_build_tgsi_intrinsic;
              bld_base->op_actions[TGSI_OPCODE_F2I].intr_name = "llvm.AMDIL.convert.f32.i32.flr.";

              Code:
              diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
              index 62de9da..f2b5c86 100644
              --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
              +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
              @@ -569,6 +569,10 @@
               	bld_base->op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit;
               	bld_base->op_actions[TGSI_OPCODE_EX2].emit = lp_build_tgsi_intrinsic;
               	bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.AMDIL.exp.";
              +        //Try using Stream Kernel Analyzer to see what a float->int generates in AMDIL
              +        //Need to find a way to convert float to int using truncate for a rounding mode (e.g. round to zero);        
              +        bld_base->op_actions[TGSI_OPCODE_F2I].emit = lp_build_tgsi_intrinsic;
              +        bld_base->op_actions[TGSI_OPCODE_F2I].intr_name = "llvm.AMDIL.convert.f32.i32.flr.";
               	bld_base->op_actions[TGSI_OPCODE_FLR].emit = lp_build_tgsi_intrinsic;
               	bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.AMDGPU.floor";
               	bld_base->op_actions[TGSI_OPCODE_FRC].emit = lp_build_tgsi_intrinsic;

              Comment


              • #37
                Originally posted by Veerappan View Post
                Code:
                diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
                index 62de9da..f2b5c86 100644
                --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
                +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
                @@ -569,6 +569,10 @@
                 	bld_base->op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit;
                 	bld_base->op_actions[TGSI_OPCODE_EX2].emit = lp_build_tgsi_intrinsic;
                 	bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.AMDIL.exp.";
                +        //Try using Stream Kernel Analyzer to see what a float->int generates in AMDIL
                +        //Need to find a way to convert float to int using truncate for a rounding mode (e.g. round to zero);        
                +        bld_base->op_actions[TGSI_OPCODE_F2I].emit = lp_build_tgsi_intrinsic;
                +        bld_base->op_actions[TGSI_OPCODE_F2I].intr_name = "llvm.AMDIL.convert.f32.i32.flr.";
                 	bld_base->op_actions[TGSI_OPCODE_FLR].emit = lp_build_tgsi_intrinsic;
                 	bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.AMDGPU.floor";
                 	bld_base->op_actions[TGSI_OPCODE_FRC].emit = lp_build_tgsi_intrinsic;
                Does not work.
                Code:
                LLVM ERROR: Cannot select: target intrinsic %llvm.AMDIL.convert.f32.i32.flr

                Comment


                • #38
                  Guys, do you put somewhere in compile flags of LLVM/MESA -fno-rtti or -frtti ?

                  Comment


                  • #39
                    Originally posted by Pontostroy View Post
                    Does not work.
                    Code:
                    LLVM ERROR: Cannot select: target intrinsic %llvm.AMDIL.convert.f32.i32.flr
                    That exact code runs on my machine, so it's possible that there's something different in your machine's configuration. Do you have any old versions of LLVM installed that might be getting in the way? And you're using LLVM 3.1?

                    In your compiled source tree, does the generated file src/gallium/drivers/radeon/AMDILGenIntrinscs.inc contain the following (probably around line 241)?:
                    AMDIL_convert_f32_i32_flr, // llvm.AMDIL.convert.f32.i32.flr
                    and
                    "llvm.AMDIL.convert.f32.i32.rpi" (around line 619 for me)

                    If that line is there, but not being discovered correctly, then it sounds like something is interfering. Currently, the only llvm on my system is in /usr/local and is a compiled git master checkout with revision: ee54010afe2f5c5674a4c51bab9ac3b80c9a92f0

                    Comment


                    • #40
                      Originally posted by Veerappan View Post
                      In your compiled source tree, does the generated file src/gallium/drivers/radeon/AMDILGenIntrinscs.inc contain the following (probably around line 241)?:
                      AMDIL_convert_f32_i32_flr, // llvm.AMDIL.convert.f32.i32.flr
                      and
                      "llvm.AMDIL.convert.f32.i32.rpi" (around line 619 for me)
                      Yes, in the same places.
                      I use llvm 3.2_svn20120421, includes only the renaming and a few other little commits.

                      Comment


                      • #41
                        Originally posted by Pontostroy View Post
                        Yes, in the same places.
                        I use llvm 3.2_svn20120421, includes only the renaming and a few other little commits.
                        Little help really precipitated. Do you use any custom CXXFLAGS to LLVM and/or MESA? -fno-rtti/-frtti ?

                        Comment


                        • #42
                          Originally posted by Pontostroy View Post
                          Yes, in the same places.
                          I use llvm 3.2_svn20120421, includes only the renaming and a few other little commits.
                          You'll need to use llvm 3.1 for now. The code does not support the changes in 3.2 yet.

                          Comment


                          • #43
                            Originally posted by Drago View Post
                            Little help really precipitated. Do you use any custom CXXFLAGS to LLVM and/or MESA? -fno-rtti/-frtti ?
                            What does llvm-config --cxxflags output?

                            Comment


                            • #44
                              Originally posted by tstellar View Post
                              What does llvm-config --cxxflags output?
                              Code:
                              [drago@drago mesa]$ llvm-config --cxxflags
                              -I/gpgpu-test/include  -fPIC -fvisibility-inlines-hidden -O3 -DNDEBUG  -D_GNU_SOURCE -Wall -W -Wno-unused-parameter -Wwrite-strings -pedantic -Wno-long-long -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS
                              [drago@drago mesa]$
                              This is x86_64 build, with GCC 4.7.0.
                              Build type: Release
                              Shared library support: Yes

                              I didn't want to bruteforce this. Recompiling whole LLVM on E-350 is not fun...

                              Comment


                              • #45
                                Originally posted by tstellar View Post
                                What does llvm-config --cxxflags output?
                                Never mind, I did it. LLVM needs `-frtti` compiler flag, in CMAKE_CXXFLAGS_[RELEASE/DEBUG/etc.].
                                Tom, maybe you could say something about it, in the commit messages and/or blog post.
                                Interestengly textures are visible. Doom3 starts, but entering the playable area segfaults, saying something about KILL AMDIL unstruction. I will try to investigate.
                                Dumping shaders for glxgears, doesn't ring any bell, yet.

                                Comment

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