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In-Kernel Power Management For ATI KMS

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  • In-Kernel Power Management For ATI KMS

    Phoronix: In-Kernel Power Management For ATI KMS

    While the Radeon R100-R500 series kernel mode-setting support appeared in the Linux 2.6.31 kernel and DRM patches pending for the Linux 2.6.32 kernel that bring KMS support for newer hardware and other improvements, the ATI KMS driver is not complete. Features such as power management need to be brought into the kernel driver (for Intel too) where they will be better off compared to the traditional DDX drivers...

    http://www.phoronix.com/vr.php?view=NzUyOA

  • #2
    I sure hope these patches can make it into Fedora 12

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    • #3
      simply incredible

      Rafał Miłecki and all the other devs:

      thank you, thank you, thank you, thank you, thank you very much

      I can't believe how fast everything is coming together !

      great work guys !

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      • #4
        Originally posted by Louise View Post
        I sure hope these patches can make it into Fedora 12
        I hope that too. My fedora laptop will finally have longer battery life.

        Comment


        • #5
          Phoronix idealized a little my patches I think it sounds too optimistic

          My work prepares only basic infrastructure for PM. This doesn't do anything useful yet actually.

          Last patch which introduces sth interesting - downclocking - is considered not ready yet. I think it may even crash module, as it doesn't even check function pointer.

          As soon as these patches hit drm-next, I'm going to continue my work and prepare something really useful. Unfortunately the most complicated part is still ahead of us: determining which power state should be used in current moment. It needs measuring current load and some smart (and lucky) choosing mode. Remember that every mode has engine clock, memory clock and voltage. We have to somehow calculate all of that.

          So I don't think you should expect something "really" working soon. Especially if you keep in mind that main (much more talented and experienced) developers are still working on other parts.
          Last edited by Zajec; 09-11-2009, 04:30 PM.

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          • #6
            Thanks, Zajec!

            Do you know by chance something about reading out temperatures? I am very interested in that.

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            • #7
              Originally posted by Zajec View Post
              As soon as these patches hit drm-next, I'm going to continue my work and prepare something really useful. Unfortunately the most complicated part is still ahead of us: determining which power state should be used in current moment. It needs measuring current load and some smart (and lucky) choosing mode. Remember that every mode has engine clock, memory clock and voltage. We have to somehow calculate all of that.
              Isn't this something which could be lifted from the proprietary driver?

              If not the actual code, then the calculations behind it? I would guess having the cards behave the same between the two drivers would be a good idea?

              Comment


              • #8
                Originally posted by Zajec View Post
                Unfortunately the most complicated part is still ahead of us: determining which power state should be used in current moment.
                Will it still have the behaviour of the current radeon driver where it downclocks during DPMS power off? That one makes a huge difference even on my 4350.

                Other than that, I imagine something like cpufreq ondemand would work, if the driver had a way to detect the framerate of running apps and change the speed as appropriate.

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                • #9
                  Originally posted by Zajec View Post
                  Phoronix idealized a little my patches I think it sounds too optimistic

                  My work prepares only basic infrastructure for PM. This doesn't do anything useful yet actually.

                  Last patch which introduces sth interesting - downclocking - is considered not ready yet. I think it may even crash module, as it doesn't even check function pointer.

                  As soon as these patches hit drm-next, I'm going to continue my work and prepare something really useful. Unfortunately the most complicated part is still ahead of us: determining which power state should be used in current moment. It needs measuring current load and some smart (and lucky) choosing mode. Remember that every mode has engine clock, memory clock and voltage. We have to somehow calculate all of that.

                  So I don't think you should expect something "really" working soon. Especially if you keep in mind that main (much more talented and experienced) developers are still working on other parts.
                  Well first thanks for the work, even though it's in an early stage.
                  But I have a couple of things in my mind, here they are :
                  As I understood it from the previous discussions here on phoronix, the really tricky part was to ensure that the down-clocking was safe.
                  By safe I mean that such down-clocking can raise issue with the memory being corrupted and thus some flushing was needed.

                  At the beginning you can always build rather simple heuristic to test how your set-up works. (for instance a function that follows the inverse of the temperature curves, really stupid since every state change should induce a change in the temperature as well, which in turn should trigger a new state change, etc...)
                  Tuning such algorithms takes time and you only end up knowing exactly what to do (and what people want you to do) once people start to complain that your implementation is too aggressive or too lazy.

                  By looking at the radeon_pm_set_state function, I see that you skipped the memory and voltage setting, isn't it a problem ? Are the frequencies of the components paired ? Or can you access the memory at every frequency from an engine at any given frequency ?
                  I might try to implement some fancy idea in your radeon_pm_adjust, if it's proven to safe from the point of view of the kernel.
                  Last edited by lucky_; 09-11-2009, 05:43 PM.

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                  • #10
                    Originally posted by whizse View Post
                    Isn't this something which could be lifted from the proprietary driver?

                    If not the actual code, then the calculations behind it? I would guess having the cards behave the same between the two drivers would be a good idea?
                    I'm afraid AMD is too busy with other things. For example Christian is waiting for HDMI audio specs (even if under NDA) for about month already.



                    Originally posted by Ant P. View Post
                    Will it still have the behaviour of the current radeon driver where it downclocks during DPMS power off? That one makes a huge difference even on my 4350.
                    That will be the easiest part and should be implemented as first PM operation. Detecting DPMS_OFF -> downclocking to minimum. Nothing could be easier Actually you can expect this one pretty soon (still, depends on amount on changes Alex will want to make to my patches).



                    Originally posted by Ant P. View Post
                    Other than that, I imagine something like cpufreq ondemand would work, if the driver had a way to detect the framerate of running apps and change the speed as appropriate.
                    If driver can detect FPS, it's something I don't know about. And probably even if, we could not use this as the only parameter to choose state. I think we will need to try observe commands submissions.

                    There already were some ideas posted on ML/IRC, will have to grab them all and consider.



                    lucky_: will read you post tomorrow, sorry Goodnight.

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                    • #11
                      No worries goodnight.

                      Comment


                      • #12
                        Originally posted by lucky_ View Post
                        By looking at the radeon_pm_set_state function, I see that you skipped the memory and voltage setting, isn't it a problem ? Are the frequencies of the components paired ? Or can you access the memory at every frequency from an engine at any given frequency ?
                        Memory clocks are more complicated than engine clocks, in the sense that memory timing depends on both engine activity and display activity (number of screens, resolution/refresh rate of each display, image depth, image tiling etc..).

                        Prior to having KMS it wasn't really practical to play with memory speeds since there was no place in the driver stack which had access to 2D, 3D, video and display activity information (unless a new protocol were defined to pass display info down to the kernel).

                        You also need to block all display and drawing activity when changing memory clocks to avoid corruption and again that could only be done in a KMS DRM.

                        Adjusting memory clocks on a GDDR5 system is more complicated because the memory subsystem needs to go through a training cycle when clocks are changed, and that can sometimes be too long to fit into a display blanking period (along with the obvious problem of what to do with two displays running at different refresh rates).

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                        • #13
                          Originally posted by bridgman View Post
                          Adjusting memory clocks on a GDDR5 system is more complicated because the memory subsystem needs to go through a training cycle when clocks are changed, and that can sometimes be too long to fit into a display blanking period (along with the obvious problem of what to do with two displays running at different refresh rates).
                          I hope this isn't a too stupid question. But why is power management done in software on the cpu?

                          Couldn't the GPU "power manage" itself in hardware?

                          Comment


                          • #14
                            Actually a very good question.

                            In principle, yes the hardware could be completely self sufficient for power management.

                            In practice, however, making the right power management decisions usually requires knowledge outside what the GPU or CPU has available. As an off-the-top-of-my-head example, you want to power down the 3D engine very aggressively when there is no drawing activity, but if your game stalls while swapping in a big texture you probably would *not* want to power down the 3D engine in that case. That decision heuristic would require that power management for the GPU be cognizant of disk activity.

                            The preferred approach for managing power is also changing over time, with a slight trend from "run the hardware as slowly as possible while maintaining acceptable performance" to "run at full speed, get the work done fast and then switch everything off as quickly as possible until more work comes along". As you can imagine, it helps a lot of the CPU and GPU power management follow the same approach

                            When setting memory clocks you need to make some pretty complex bandwidth and latency calculations in order to make sure that the display fifos don't get starved for data when the 3D engine is drawing into the same memory. One implication of this is that the minimum memory clock setting is a function of engine clock, drawing activity, number of active displays, depth / resolution / refresh rate.

                            Since changing clocks takes a non-trivial amount of time (you need to let the PLLs in the clock generators settle at the new frequency after changing dividers) you need to include recent behaviour trends in the decision-making logic, not just what is happening at this instant, in order to avoid too-frequent changes with the associated waste of power and time. All of this can be done in hardware but you can see how quickly the complexity can grow.

                            Anyways, bottom line is getting the very best power efficiency always seems to require making decisions using more information than what is available to each individual device, ie shifting from focusing on device power management to focusing on platform power management.
                            Last edited by bridgman; 09-11-2009, 09:31 PM.

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                            • #15
                              Originally posted by bugmenot View Post
                              Thanks, Zajec!

                              Do you know by chance something about reading out temperatures? I am very interested in that.
                              Don't know. I just checked AtomBIOS commands but don't see anything related to temperature there. Just
                              GPIOPinControl command makes me wondering. Can sb explain what for is GPIO used on ATI cards?
                              So we probably have to use some magic not-yet-known register to get temperature.



                              lucky_: OK, I see bridgman replied to you.


                              I still don't know how we should calculate load. Someone posted yesterday idea of checking command buffer (it's full → GPU too slow). Don't know much about that, have to check how CS works.

                              Also I don't know what modes we can use for whole clocking. Anything between minimum and maximum? Or only states found in AtomBIOS?

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